Migration between CPU cores
First Claim
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1. A method comprising:
- processing, by a plurality of processor cores of a storage controller, one or more tasks and one or more interrupt service routines;
determining a performance statistic corresponding to the plurality of processor cores; and
reducing, in response to detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to process the one or more tasks and the one or more interrupt service routines by transitioning from a multi-core configuration to a single-core configuration.
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Abstract
Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.
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18 Claims
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1. A method comprising:
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processing, by a plurality of processor cores of a storage controller, one or more tasks and one or more interrupt service routines; determining a performance statistic corresponding to the plurality of processor cores; and reducing, in response to detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to process the one or more tasks and the one or more interrupt service routines by transitioning from a multi-core configuration to a single-core configuration. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A non-transitory machine-readable medium having stored thereon instructions for performing a method comprising machine executable code that when executed by at least one machine, causes the machine to:
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process, by a plurality of processor cores, one or more tasks and one or more interrupt service routines; determine an operations request rate corresponding to the plurality of processor cores; and reduce, in response to detecting that the operations request rate is below a threshold, a number of the plurality of processor cores that are assigned to process the one or more tasks and handle interrupts corresponding to the one or more interrupt service routines by transitioning from a multi-core configuration to a single-core configuration. - View Dependent Claims (8, 9, 10, 11)
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12. A computing device comprising:
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a memory containing machine-readable medium comprising machine executable code having stored thereon instructions for performing a method of transitioning tasks and interrupts from a multi-core configuration to a single-core configuration; and a processor coupled to the memory, the processor configured to execute the machine executable code to cause the processor to; process, by a plurality of cores, one or more tasks and one or more interrupt service routines; determine a performance statistic corresponding to the plurality of cores; and reduce, in response to detecting that the performance statistic passes a threshold, an amount of the plurality of cores that are assigned to process the one or more tasks and handle interrupts corresponding to the one or more interrupt service routines by transitioning from a multi-core configuration to a single-core configuration. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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Specification