Variable acquisition buffer length

• US 10,459,856 B2
• Filed: 12/30/2016
• Issued: 10/29/2019
• Est. Priority Date: 12/30/2016
• Status: Active Grant

• Current Assignee: Itron, Inc.
• Original Assignee: Itron, Inc.
• Inventors: DeCaux, Pierre, Grey, Steven A.
• Primary Examiner(s): Toatley, Jr., Gregory J
• Assistant Examiner(s): Stifter, Jr., Terence E
• Application Number:
  US15/395,311
• Publication Number:
  US 20180189203A1
• Time in Patent Office: 1,033 Days
• Field of Search: None
• CPC Class Codes: G01R 19/2509 Details concerning sampling, digitizing or waveform capturing
• CPC Class Codes: G01R 19/2513 Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging
• CPC Class Codes: G01R 21/133 by using digital technique
• CPC Class Codes: G01R 22/10 using digital techniques
• CPC Class Codes: G06F 13/12 using hardware independent of the central processor, e.g. channel or peripheral processor
• CPC Class Codes: G06F 13/1673 using buffers

Abstract

A system and method for determining an acquisition buffer size for use in processing signals, the method including determining a number of samples obtained for a predetermined number of line cycles based on digital signals received from an analog-to-digital converter (106), determining an integer number of line cycles needed for a predetermined target number of samples, and determining an acquisition buffer length based on the integer number of line cycles, as a length of time that can accommodate the determined integer number of line cycles while minimizing or avoiding partial line cycles. The method can further include determining whether the determined acquisition buffer length is within a threshold range, and when not within the threshold, continuing to store a previously determined acquisition buffer length instead of the determined acquisition buffer length. The method may be repeated to continually adjust the acquisition buffer length to minimize or avoid partial line cycles.

Claims

1. A device for determining an acquisition buffer size for use in processing signals, the device comprising:

a processor;

a memory in communication with the processor, the memory storing instructions for execution by the processor; and

an analog-to-digital converter in communication with the processor, the analog-to-digital converter configured to continuously sample a voltage signal, convert each sampled signal into a digital signal, and provide each sampled digital signal to the processor,

wherein the processor is configured to, in accordance with the instructions;

determine a number of samples obtained for a predetermined number of line cycles based on the provided sampled digital signals;

determine an integer number of line cycles needed for a predetermined target number of samples based on the determined number of samples;

determine an acquisition buffer length based on the determined integer number of line cycles, wherein the determined acquisition buffer length is a length of time that can accommodate the determined integer number of line cycles while minimizing partial line cycles;

determine whether the determined acquisition buffer length is within a threshold range;

when the determined acquisition buffer length is within the threshold range, store the determined acquisition buffer length in the memory;

when the determined acquisition buffer length is not within the threshold range, continue to store a previously determined acquisition buffer length in the memory instead of storing the determined acquisition buffer length; and

repeat the determining the number of samples, the determining the integer number of line cycles, the determining the acquisition buffer length, the determining whether the determined acquisition buffer length is within the threshold range, and the storing of the determined acquisition buffer length to continually adjust the acquisition buffer length to accommodate the determined integer number of line cycles while minimizing partial line cycles.

2. The device of claim 1, wherein the device is part of a metering device.

3. The device of claim 2, wherein one or more of energy amounts or root mean square values are determined based on voltage and current signals processed using the determined acquisition buffer length.

4. The device of claim 3, wherein the energy amounts include one or more of watt-hours, volt-ampere-hours, or reactive volt-ampere-hours.

5. The device of claim 1, wherein the predetermined target number of samples is a target number of samples to be received in a given time period.

6. The device of claim 1, wherein the determining the acquisition buffer length includes determining the acquisition buffer length based on the integer number of line cycles, wherein the determined acquisition buffer length is a length of time that can accommodate the determined integer number of line cycles with no partial line cycles.

7. The device of claim 1, wherein the processor is further configured, as part of determining the number of samples obtained for the predetermined number of line cycles, to:

count the number of samples obtained for the predetermined number of line cycles;

determine a difference between the counted number of samples and a previously counted number of samples for the predetermined number of line cycles;

determine whether the difference is within a predetermined threshold;

when the difference is within the predetermined threshold, continue with the determining the integer number of line cycles, determining the acquisition buffer length, and storing the determined acquisition buffer length; and

when the difference is not within the predetermined threshold, continue to store a previously stored determined acquisition buffer length in the memory.

8. A method of determining an acquisition buffer size for use in processing signals, comprising:

continuously sampling, by an analog-to-digital converter, a voltage signal;

converting, by the analog-to-digital converter, each sampled voltage signal into a digital signal;

providing, by the analog-to-digital converter, each sampled digital signal to a processor;

determining, by the processor, a number of samples obtained for a predetermined number of line cycles based on the provided sampled digital signals;

determining, by the processor, an integer number of line cycles needed for a predetermined target number of samples based on the determined number of samples;

determining, by the processor, an acquisition buffer length based on the determined integer number of line cycles, wherein the determined acquisition buffer length is a length of time that can accommodate the determined integer number of line cycles while minimizing partial line cycles;

determining, by the processor, whether the determined acquisition buffer length is within a threshold range;

when the determined acquisition buffer length is within the threshold range, storing the determined acquisition buffer length in a memory;

when the determined acquisition buffer length is not within the threshold range, continuing to store a previously determined acquisition buffer length in the memory instead of storing the determined acquisition buffer length; and

repeating the determining the number of samples, the determining the integer number of line cycles, the determining the acquisition buffer length, the determining whether the determined acquisition buffer length is within the threshold range, and the storing of the determined acquisition buffer length to continually adjust the acquisition buffer length to accommodate the determined integer number of line cycles while minimizing partial line cycles.

9. The method of claim 8, wherein the analog-to-digital converter, processor, and memory are part of a metering device, the method further comprising:

determining, by the processor, one or more of energy amounts or root mean square values based on voltage and current signals processed using the determined acquisition buffer length.

10. The method of claim 9, wherein the energy amounts include one or more of watt-hours, volt-ampere-hours, or reactive volt-ampere-hours.

11. The method of claim 8, wherein the predetermined target number of samples is a target number of samples to be received in a given time period.

12. The method of claim 8, wherein the determining the acquisition buffer length includes determining the acquisition buffer length based on the integer number of line cycles, wherein the acquisition buffer length is a length of time that can accommodate the determined integer number of line cycles with no partial line cycles.

13. The method of claim 8, wherein the determining the number of samples obtained for the predetermined number of line cycles includes:

counting the number of samples obtained for the predetermined number of line cycles;

determining a difference between the counted number of samples and a previously counted number of samples for the predetermined number of line cycles;

determining whether the difference is within a predetermined threshold;

when the difference is within the predetermined threshold, continuing with the determining the integer number of line cycles, determining the acquisition buffer length, and storing the determined acquisition buffer length; and

when the difference is not within the predetermined threshold, continuing to store a previously stored determined acquisition buffer length in the memory.

14. At least one non-transitory computer-readable medium having computer program logic stored thereon, the computer program logic including instructions that, when executed by a processor, cause the processor to:

determine a number of samples obtained for a predetermined number of line cycles based on digital signals received from an analog-to-digital converter, the digital signals converted from analog voltage signals sampled by the analog-to-digital converter;

determine an integer number of line cycles needed for a predetermined target number of samples based on the determined number of samples;

determine an acquisition buffer length based on the integer number of line cycles, wherein the determined acquisition buffer length is a length of time that can accommodate the determined integer number of line cycles while minimizing partial line cycles;

determine whether the determined acquisition buffer length is within a threshold range;

when the determined acquisition buffer length is within the threshold range, store the determined acquisition buffer length in a memory;

when the determined acquisition buffer length is not within the threshold range, continue to store a previously determined acquisition buffer length in the memory instead of storing the determined acquisition buffer length; and

repeat the determining the number of samples, the determining the integer number of line cycles, the determining the acquisition buffer length, the determining whether the determined acquisition buffer length is within the threshold range, and the storing of the determined acquisition buffer length to continually adjust the acquisition buffer length to accommodate the determined integer number of line cycles while minimizing partial line cycles.

15. The at least one non-transitory computer readable medium of claim 14, wherein the predetermined target number of samples is a target number of samples to be received in a given time period.

16. The at least one non-transitory computer readable medium of claim 14, wherein the determining the acquisition buffer length includes determining the acquisition buffer length based on the integer number of line cycles, wherein the acquisition buffer length is a length of time that can accommodate the determined integer number of line cycles with no partial line cycles.

17. The at least one non-transitory computer readable medium of claim 14, wherein the determining the number of samples obtained for the predetermined number of line cycles includes:

counting the number of samples obtained for the predetermined number of line cycles;

determining a difference between the counted number of samples and a previously counted number of samples for the predetermined number of line cycles;

determining whether the difference is within a predetermined threshold;

when the difference is within the predetermined threshold, continuing with the determining the integer number of line cycles, determining the acquisition buffer length, and storing the determined acquisition buffer length; and

when the difference is not within the predetermined threshold, continuing to store a previously stored determined acquisition buffer length in the memory.