Functional reactive PCells
First Claim
1. An electric design automation (EDA) computing device comprising:
- a memory, andone or more hardware processors coupled to the memory and configured to;
initiate a processor evaluation of a first parameterized cell comprising data stored in the memory to generate a first instance of the first parameterized cell, the first parameterized cell comprising one or more reactive parameters and the first parameterized cell being part of a circuit design dataset;
access one or more static cell parameters for the first parameterized cell from a memory of the EDA computing device;
identify a first reactive parameter of the one or more reactive parameters and a first evaluation state associated with the first reactive parameter;
determine a first value of the first reactive parameter, wherein the first value of the first reactive parameter is determined, at least in part, in conjunction with one or more context elements of the circuit design dataset having a first set of context values, and wherein the one or more context elements are identified by the one or more hardware processors as part of the processor evaluation of the first parameterized cell; and
generate the first parameterized cell using the one or more static cell parameters and the first value of the first reactive parameter, the first instance of the first parameterized cell.
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Accused Products
Abstract
Electronic design automation systems and methods for functional reactive parameterized cells (FR-PCells) are described. In one embodiment, a PCell includes a reactive parameter that is based on context information regarding other cells or elements of an overall circuit design. Processing of the FR-PCell may then depend on processing of other PCells or other elements of a circuit design. Similarly, an FR-PCell may provide context information to other FR-PCells. In some embodiments, processing of an FR-PCell to generate an instance of the FR-PCell is managed by a reaction engine that monitors updates to context information or other PCells to automatically adjust instances of the FR-PCells.
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Citations
20 Claims
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1. An electric design automation (EDA) computing device comprising:
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a memory, and one or more hardware processors coupled to the memory and configured to; initiate a processor evaluation of a first parameterized cell comprising data stored in the memory to generate a first instance of the first parameterized cell, the first parameterized cell comprising one or more reactive parameters and the first parameterized cell being part of a circuit design dataset; access one or more static cell parameters for the first parameterized cell from a memory of the EDA computing device; identify a first reactive parameter of the one or more reactive parameters and a first evaluation state associated with the first reactive parameter; determine a first value of the first reactive parameter, wherein the first value of the first reactive parameter is determined, at least in part, in conjunction with one or more context elements of the circuit design dataset having a first set of context values, and wherein the one or more context elements are identified by the one or more hardware processors as part of the processor evaluation of the first parameterized cell; and generate the first parameterized cell using the one or more static cell parameters and the first value of the first reactive parameter, the first instance of the first parameterized cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method performed by an electronic design automation (EDA) computing device comprising one or more processors and a memory coupled to the one or more processors, the method comprising:
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receiving a user input to adjust a first portion of a layout to generate an initial functional reactive parameterized cell (FR-PCell) layout, the initial FR-PCell layout comprising a first parameterized cell; in response to the user input, automatically initiating a processor evaluation of the first parameterized cell, the first parameterized cell comprising one or more reactive parameters and the first parameterized cell being part of a circuit design dataset; identifying a first reactive parameter of the one or more reactive parameters at a first evaluation state as part of the processor evaluation; determining a first value of the first reactive parameter at the first evaluation state, wherein the first value of the first reactive parameter is determined, at least in part, in conjunction with one or more context elements of the circuit design dataset having a first set of context values, and wherein the one or more context elements are identified by the one or more hardware processors as part of the processor evaluation of the first parameterized cell; and generating a first layout state comprising a first instance of the first parameterized cell using the first value of the first reactive parameter. - View Dependent Claims (10, 11, 12)
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13. A non-transitory computer readable medium comprising instructions that, when executed by one or more processors of a device, cause the device to perform operations comprising:
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receiving a user input to adjust a first portion of a layout to generate an initial functional reactive parameterized cell (FR-PCell) layout, the initial FR-PCell layout comprising a first parameterized cell; in response to the user input, automatically initiating a processor evaluation of the first parameterized cell, the first parameterized cell comprising one or more reactive parameters and the first parameterized cell being part of a circuit design dataset; identifying a first reactive parameter of the one or more reactive parameters at a first evaluation state as part of the processor evaluation; determining a first value of the first reactive parameter at the first evaluation state, wherein the first value of the first reactive parameter is determined, at least in part, in conjunction with one or more context elements of the circuit design dataset having a first set of context values, and wherein the one or more context elements are identified by the one or more hardware processors as part of the processor evaluation of the first parameterized cell; and generating a first layout state comprising a first instance of the first parameterized cell using the first value of the first reactive parameter. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification