Patterning method

• US 10,460,939 B1
• Filed: 05/09/2018
• Issued: 10/29/2019
• Est. Priority Date: 04/17/2018
• Status: Active Grant

• Current Assignee: Fujian Jinhua Integrated Circuit Co., Ltd., United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Chang, Feng-Yi, Lee, Fu-Che, Chiang, Hsin-Yu
• Primary Examiner(s): Roman, Angel
• Application Number:
  US15/975,730
• Publication Number:
  US 20190318930A1
• Time in Patent Office: 538 Days
• Field of Search: None
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/32139 using masks

Abstract

A patterning method includes the following steps. A second mask layer is formed on a first mask layer. A patterning process is performed to the first mask layer and the second mask layer. The first mask layer is patterned to be a first mask pattern, and the second mask layer is patterned to be a second mask pattern formed on the first mask pattern. A first trim process is performed to the second mask pattern. A width of the second mask pattern is smaller than a width of the first mask pattern after the first trim process. A cover layer is formed covering the first mask pattern and the second mask pattern after the first trim process, and an etching process is performed to the first mask pattern after the step of forming the cover layer.

Claims

1. A patterning method, comprising:

forming a second mask layer on a first mask layer;

performing a patterning process to the first mask layer and the second mask layer, wherein the first mask layer is patterned to be a first mask pattern, and the second mask layer is patterned to be a second mask pattern formed on the first mask pattern;

performing a first trim process to the second mask pattern, wherein a width of the second mask pattern is smaller than a width of the first mask pattern after the first trim process;

forming a cover layer covering the first mask pattern and the second mask pattern after the first trim process;

performing an etching process to the first mask pattern after the step of forming the cover layer;

removing a part of the cover layer for exposing the second mask pattern before the etching process;

removing the second mask pattern before the etching process; and

performing a second trim process to the cover layer after the step of removing the second mask pattern and before the etching process.

2. The patterning method according to claim 1, wherein the first trim process comprises:

performing a plasma treatment to the second mask pattern, wherein a part of the second mask pattern is converted into a treated layer by the plasma treatment; and

removing the treated layer after the plasma treatment.

3. The patterning method according to claim 2, wherein the plasma treatment comprises an oxidation treatment or a hydrogenation treatment.

4. The patterning method according to claim 3, wherein the part of the second mask pattern is oxidized or hydrogenated by the plasma treatment to be the treated layer.

5. The patterning method according to claim 3, wherein the oxidation treatment comprises a thermal oxidation treatment, and a process temperature of the oxidation treatment is higher than or equal to 250°

C.

6. The patterning method according to claim 3, wherein an oxygen pressure used in the oxidation treatment is higher than or equal to 1 bar.

7. The patterning method according to claim 2, wherein the treated layer encompasses the second mask pattern.

8. The patterning method according to claim 2, wherein the first mask pattern comprises first sub patterns, and the treated layer covers a side surface of each of the first sub patterns.

9. The patterning method according to claim 8, wherein the treated layer on the side surfaces of the first sub patterns is formed by consuming a part of each of the first sub patterns.

10. The patterning method according to claim 1, wherein the second mask layer comprises a nitrogen doped silicon carbide layer.

11. The patterning method according to claim 1, wherein the width of the second mask pattern after the first trim process is smaller than the width of the second mask pattern before the first trim process.

12. The patterning method according to claim 1, wherein the width of the second mask pattern is equal to the width of the first mask pattern before the first trim process.

13. The patterning method according to claim 1, wherein the first mask pattern comprises first sub patterns, the second patterned mask comprises second sub patterns, and a distance between two of the first sub patterns adjacent to each other is equal to a width of each of the second sub patterns after the first trim process.

14. The patterning method according to claim 1, wherein the cover layer comprises a planarization layer, and space in the second mask pattern and the first mask pattern is filled with the cover layer.

15. The patterning method according to claim 1, wherein the second mask pattern is removed for forming openings in the cover layer, and each of the openings exposes a part of the first mask pattern.

16. The patterning method according to claim 15, wherein the etching process is performed using the cover layer as a mask after the step of removing the second mask pattern, and the first mask pattern is etched to be a third mask pattern.

17. The patterning method according to claim 16, wherein the first mask layer is formed on a material layer, and the patterning method further comprising:

transferring the pattern of the third mask pattern to the material layer.