Method of manufacturing a semiconductor device
First Claim
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1. A semiconductor device having an SiC-IGBT and an SiC-MOSFET in a single semiconductor chip, comprising:
- a first conductive-type SiC base layer having a first surface and a second surface, the second surface of the first conductive-type SiC base layer being on a first conductive-type SiC substrate, the first conductive-type SiC substrate having a first surface facing the second surface of the SiC base layer and a second surface opposite the first surface of the SiC substrate and defining a drain region of the SiC-MOSFET;
a trench etched in the second surface of the SiC substrate, the trench dividing the SiC substrate into a plurality of first conductive-type regions;
a second conductive-type region in a bottom surface of the trench so as to form a collector region in the bottom surface;
a second conductive-type region in the first surface of the SiC base layer so as to form a channel region in a surficial portion of the SiC base layer;
a first conductive-type region in the first surface of the SiC base layer so as to form an emitter region in a surficial portion of the channel region, the emitter region serving also as a source region of the SiC-MOSFET;
a second conductive-type region in the first surface of the SiC base layer so as to form a channel contact region in a surficial portion of the SiC base layer, the channel contact region penetrating the emitter region and contacting with the channel region, whereina first unit including the channel region, the emitter region and the channel contact region faces a second unit including a plurality of collector region and the plurality of the first conductive-type regions in the thickness direction of the SiC base layer, anda deepest portion of the trench is at a position nearer the first surface of the SiC base layer with respect to an interface between the SiC substrate and the SiC base layer.
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Abstract
A method for manufacturing a semiconductor device having an SiC-IGBT and an SiC-MOSFET in a single semiconductor chip, including forming a second conductive-type SiC base layer on a substrate, and selectively implanting first and second conductive-type impurities into surfaces of the substrate and base layer to form a collector region, a channel region in a surficial portion of the SiC base layer, and an emitter region in a surficial portion of the channel region, the emitter region serving also as a source region of the SiC-MOSFET.
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Citations
16 Claims
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1. A semiconductor device having an SiC-IGBT and an SiC-MOSFET in a single semiconductor chip, comprising:
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a first conductive-type SiC base layer having a first surface and a second surface, the second surface of the first conductive-type SiC base layer being on a first conductive-type SiC substrate, the first conductive-type SiC substrate having a first surface facing the second surface of the SiC base layer and a second surface opposite the first surface of the SiC substrate and defining a drain region of the SiC-MOSFET; a trench etched in the second surface of the SiC substrate, the trench dividing the SiC substrate into a plurality of first conductive-type regions; a second conductive-type region in a bottom surface of the trench so as to form a collector region in the bottom surface; a second conductive-type region in the first surface of the SiC base layer so as to form a channel region in a surficial portion of the SiC base layer; a first conductive-type region in the first surface of the SiC base layer so as to form an emitter region in a surficial portion of the channel region, the emitter region serving also as a source region of the SiC-MOSFET; a second conductive-type region in the first surface of the SiC base layer so as to form a channel contact region in a surficial portion of the SiC base layer, the channel contact region penetrating the emitter region and contacting with the channel region, wherein a first unit including the channel region, the emitter region and the channel contact region faces a second unit including a plurality of collector region and the plurality of the first conductive-type regions in the thickness direction of the SiC base layer, and a deepest portion of the trench is at a position nearer the first surface of the SiC base layer with respect to an interface between the SiC substrate and the SiC base layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A semiconductor device having an SiC-IGBT and an SiC-MOSFET in a single semiconductor chip, comprising:
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a first conductive-type SiC base layer having a first surface and a second surface, the second surface of the first conductive-type SiC base layer being on a first conductive-type SiC substrate, the first conductive-type SiC substrate having a first surface facing the second surface of the SiC base layer and a second surface opposite the first surface of the SiC substrate and defining a drain region of the SiC-MOSFET; a trench etched in the second surface of the SiC substrate, the trench dividing the SiC substrate into a plurality of first conductive-type regions; a second conductive-type region in a bottom surface of the trench so as to form a collector region in the bottom surface; a second conductive-type region in the first surface of the SiC base layer so as to form a channel region in a surficial portion of the SiC base layer; a first conductive-type region in the first surface of the SiC base layer so as to form an emitter region in a surficial portion of the channel region, the emitter region serving also as a source region of the SiC-MOSFET; a second conductive-type region in the first surface of the SiC base layer so as to form a channel contact region in a surficial portion of the SiC base layer, the channel contact region penetrating the emitter region and contacting with the channel region, wherein a first unit including the channel region, the emitter region and the channel contact region faces a second unit including a plurality of collector region and the plurality of the first conductive-type regions in the thickness direction of the SiC base layer, the collector region has a first surface extending along the second surface of the SiC base layer and a second surface extending along a thickness direction of the SiC base layer, the SiC base layer includes a first region having a first impurity concentration in contact with the channel region and a second region having a second impurity concentration higher than the first impurity concentration and surrounding the collector region such that the second region is in contact with both the first surface and the second surface of the collector region, and the second region of the SiC base layer is independent from the drain region.
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Specification