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Super-self-aligned contacts and method for making the same

  • US 10,461,081 B2
  • Filed: 11/13/2017
  • Issued: 10/29/2019
  • Est. Priority Date: 12/13/2007
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device, comprising:

  • a first linear gate structure;

    a second linear gate structure located next to the first linear gate structure, the second linear gate structure separated from the first linear gate structure by a gate pitch, the second linear gate structure forming a first PMOS transistor and a first NMOS transistor;

    a third linear gate structure located next to the second linear gate structure, the third linear gate structure separated from the second linear gate structure by the gate pitch, the third linear gate structure forming a second PMOS transistor and a second NMOS transistor;

    a fourth linear gate structure located next to the third linear gate structure, the fourth linear gate structure separated from the third linear gate structure by the gate pitch, the fourth linear gate structure forming a third PMOS transistor and a third NMOS transistor;

    a fifth linear gate structures located next to the fourth linear gate structure, the fifth linear gate structure separated from the fourth linear gate structure by the gate pitch;

    a first gate contact physically connected to the second linear gate structure at a location between the first PMOS transistor and the first NMOS transistor;

    a second gate contact physically connected to the third linear gate structure at a location between the second PMOS transistor and the second NMOS transistor; and

    a third gate contact physically connected to the fourth linear gate structure at a location between the third PMOS transistor and the third NMOS transistor.

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