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Well-based integration of heteroepitaxial N-type transistors with P-type transistors

  • US 10,461,082 B2
  • Filed: 06/26/2015
  • Issued: 10/29/2019
  • Est. Priority Date: 06/26/2015
  • Status: Active Grant
First Claim
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1. Integrated circuit (IC) structures, comprising:

  • a well recess in a first region of a substrate, the well recess containing an amorphous well-isolation material over a bottom of the well recess, and a crystalline well material over the well-isolation material, wherein the well material is coupled to a seeding surface of the substrate at the bottom of the well recess by a crystalline pillar material that extends through the well-isolation material;

    an amorphous fin-isolation material over a first surface of the well material, and over a second surface in a second region of the substrate adjacent to the first region wherein the first surface is substantially planar with the second surface; and

    a first fin comprising a first crystalline material, wherein the first fin extends from the first surface of the well material and protrudes through the fin-isolation material to a first height over the fin-isolation material; and

    a second fin comprising a second crystalline material, wherein the second fin extends from the second surface of the second region of the substrate and protrudes through the fin-isolation material to a second height over the fin-isolation material, the second height being substantially equal to the first height.

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