Full range realignment ring oscillator
First Claim
1. A realignment ring-cell circuit, comprising:
- a single-to-differential unit having an input configured to receive a realignment signal, a first output for outputting a first differential output and a second output for outputting a second differential output;
an OR gate, wherein the first output for outputting is a first input to the OR gate;
an AND gate, wherein the second output for outputting is a first input to the AND gate;
a first P-type metal-oxide-semiconductor transistor, wherein a gate of the P-type metal-oxide-semiconductor transistor is electrically connected to an output of the OR gate; and
a first N-type metal-oxide-semiconductor transistor, wherein a gate of the N-type metal-oxide-semiconductor transistor is electrically connected to an output of the AND gate, wherein a drain of the P-type metal-oxide-semiconductor transistor and a drain of the N-type metal-oxide-semiconductor transistor are electrically connected to each other and are further electrically connected to a second input of the OR gate and a second input of the AND gate.
1 Assignment
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Accused Products
Abstract
A realignment ring-cell circuit is disclosed. The circuit includes a single-to-differential unit, an OR gate, an AND gate, a first P-type metal-oxide-semiconductor transistor, and a first N-type metal-oxide-semiconductor transistor. The single-to-differential unit has an input configured to receive a realignment signal, a first output for outputting a first differential output and a second output for outputting a second differential output. The first output for outputting is a first input to the OR gate. The second output for outputting is a first input to the AND gate. A gate of the P-type metal-oxide-semiconductor transistor is electrically connected to an output of the OR gate. A gate of the N-type metal-oxide-semiconductor transistor is electrically connected to an output of the AND gate. A drain of the P-type metal-oxide-semiconductor transistor and a drain of the N-type metal-oxide-semiconductor transistor are electrically connected to each other and are further electrically connected to a second input of the OR gate and a second input of the AND gate.
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Citations
20 Claims
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1. A realignment ring-cell circuit, comprising:
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a single-to-differential unit having an input configured to receive a realignment signal, a first output for outputting a first differential output and a second output for outputting a second differential output; an OR gate, wherein the first output for outputting is a first input to the OR gate; an AND gate, wherein the second output for outputting is a first input to the AND gate; a first P-type metal-oxide-semiconductor transistor, wherein a gate of the P-type metal-oxide-semiconductor transistor is electrically connected to an output of the OR gate; and a first N-type metal-oxide-semiconductor transistor, wherein a gate of the N-type metal-oxide-semiconductor transistor is electrically connected to an output of the AND gate, wherein a drain of the P-type metal-oxide-semiconductor transistor and a drain of the N-type metal-oxide-semiconductor transistor are electrically connected to each other and are further electrically connected to a second input of the OR gate and a second input of the AND gate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A full-range realignment ring oscillator circuit, comprising:
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a full range realignment ring cell configured to realign a pulse signal with a realignment pulse, wherein the full range realignment ring cell has a first input and a second input, wherein the full range realignment ring cell comprises a single-to-differential unit having an input configured to receive a realignment signal, a first output and a second output; and an even number of serially connected ring cells, wherein an output of the full range realignment ring cell is electrically connected to an input of a first ring cell in the even number of serially connected ring cells, wherein an output of a last ring cell in the even number of serially connected ring cells is electrically connected to the first input of the full range realignment ring cell. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A method for operating a full range realignment ring oscillator, the method comprises:
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deploying a full range realignment cell configured to realign a pulse signal with a realignment pulse comprising a single-to-differential unit, an OR gate, an AND gate, a P-type metal-oxide-semiconductor transistor and an N-type metal-oxide-semiconductor transistor; converting a single-ended realignment signal to a first output for outputting a first differential output and a second output for outputting a second differential output; and detecting a level of common drain to decide whether to turn on the P-type metal-oxide-semiconductor transistor or the N-type metal-oxide-semiconductor transistor. - View Dependent Claims (17, 18, 19, 20)
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Specification