Techniques for configurable ADC front-end RC filter
First Claim
1. A front-end circuit for suppressing signal transfer function peaking of a processing circuit, the front-end circuit comprising:
- a resistor-capacitor filter including at least two capacitors, the resistor-capacitor filter configured to couple an input analog signal to the processing circuit;
a switch circuit coupled to a first capacitor of the at least two capacitors, the switch circuit configured to selectively place a terminal of the first capacitor at a selected one of a plurality of distinct nodes of the resistor-capacitor filter; and
wherein the resistor-capacitor filter comprises;
a first set of series-connected resistances configured to couple a first differential input terminal with a first input of the processing circuit;
, anda second set of series-connected resistances configured to couple a second differential input terminal with a second input of the processing circuit.
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Abstract
Techniques for a configurable analog-to-digital converter filter to ameliorate transfer function peaking or frequency response issues are provided. In an example, a front-end circuit of a processing circuit can include a resistor-capacitor filter including at least two capacitors and a switch circuit. The resistor-capacitor filter can couple an input analog signal to the processing circuit. The switch circuit can couple to a first capacitor of the at least two capacitors, and can selectively place a terminal of the first capacitor at a selected one of a plurality of distinct nodes of the resistor-capacitor filter to configure the circuit to address the peaking or frequency response issue.
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Citations
23 Claims
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1. A front-end circuit for suppressing signal transfer function peaking of a processing circuit, the front-end circuit comprising:
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a resistor-capacitor filter including at least two capacitors, the resistor-capacitor filter configured to couple an input analog signal to the processing circuit; a switch circuit coupled to a first capacitor of the at least two capacitors, the switch circuit configured to selectively place a terminal of the first capacitor at a selected one of a plurality of distinct nodes of the resistor-capacitor filter; and wherein the resistor-capacitor filter comprises; a first set of series-connected resistances configured to couple a first differential input terminal with a first input of the processing circuit;
, anda second set of series-connected resistances configured to couple a second differential input terminal with a second input of the processing circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 21)
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9. A front-end circuit for suppressing signal transfer function peaking of an analog-to-digital converter (ADC), the circuit comprising:
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a plurality of resistor-capacitor (RC) filters selectively coupled in parallel with each other, the plurality of RC filters configured to couple an input analog signal with an integrator of the ADC; and wherein each resistor-capacitor filter includes at least two capacitors; and wherein a first capacitor of the at least two capacitors is electrically coupled closer to the integrator than a second capacitor of the at least two capacitors. - View Dependent Claims (10, 11, 12, 13, 14, 15, 22)
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16. A system to enhance an analog-to-digital converter (ADC) transfer function by adjusting a front-end filter circuit, the system comprising:
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an ADC; and a configurable resistor-capacitor filter having at least two capacitors, the configurable resistor-capacitor filter configured to receive an analog input signal, to pass the analog input signal to a first integrator of the ADC, and to suppress signal transfer function peaking of the ADC. - View Dependent Claims (17, 18, 19, 20, 23)
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Specification