MEMS capacitive pressure sensors in fully depleted semiconductor on insulator (FDSOI)
First Claim
Patent Images
1. A structure, comprising:
- a top membrane of semiconductor material having edges defined by epitaxial material and a liner material;
a back gate under the top membrane; and
a cavity defined between the top membrane and the back gate,wherein the liner material is an insulator material and the epitaxial material is a semiconductor material of a different polarity type than the top membrane.
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Abstract
The present disclosure relates to semiconductor structures and, more particularly, to pressure sensors and methods of manufacture. The structure includes: a top membrane of semiconductor material having edges defined by epitaxial material and a liner material; a back gate under the top membrane; and a cavity defined between the top membrane and the back gate.
6 Citations
10 Claims
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1. A structure, comprising:
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a top membrane of semiconductor material having edges defined by epitaxial material and a liner material; a back gate under the top membrane; and a cavity defined between the top membrane and the back gate, wherein the liner material is an insulator material and the epitaxial material is a semiconductor material of a different polarity type than the top membrane. - View Dependent Claims (2, 3, 4, 5)
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6. A structure, comprising:
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a top membrane of semiconductor material having edges defined by epitaxial material and a liner material; a back gate under the top membrane; and a cavity defined between the top membrane and the back gate, wherein the cavity is defined by the top membrane, the bottom membrane and its edges are defined by the epitaxial material and the liner material.
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7. A structure comprising:
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a top membrane of semiconductor material having it edges defined by epitaxial material and a liner material; a bottom membrane of doped bulk semiconductor material; and a cavity defined by the top membrane and the bottom membrane, with its edges defined by the epitaxial material on one edge and the liner material on remaining edges. - View Dependent Claims (8, 9, 10)
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Specification