Hall effect sensor circuit with offset compensation

• US 10,466,311 B2
• Filed: 09/04/2014
• Issued: 11/05/2019
• Est. Priority Date: 09/04/2014
• Status: Active Grant

• Current Assignee: The Timken Company
• Original Assignee: The Timken Company
• Inventors: Wang, Lei, Santos, Alfred J., Lacroix, Mark E.
• Primary Examiner(s): McAndrew, Christopher P
• Application Number:
  US15/508,121
• Publication Number:
  US 20170248662A1
• Time in Patent Office: 1,888 Days
• Field of Search: 324251
• CPC Class Codes: G01R 33/0029 Treating the measured signals, e.g. removing offset or noise
• CPC Class Codes: G01R 33/075 Hall devices configured for spinning current measurements

Abstract

A method and apparatus for sensing magnetic field strength with a pair of Hall effect sensors includes sampling a sensed voltage for the Hall effect sensors during a first phase and combining the sensed voltage. During a second phase, obtaining sensed voltages for the Hall effect sensors and combining the sensed voltages. The sensed voltages from the first phase and the second phase are combined to obtain a summed voltage and remove the Hall effect sensor and amplifier offset error value. In one arrangement, the summed voltage corresponds to the sensed Hall voltage of the first Hall effect sensor added to the Hall voltage of the second Hall effect sensor. In another arrangement, the summed voltage corresponds to the sensed Hall voltage of the first Hall effect sensor subtracted by the sensed Hall voltage of the second Hall effect sensor. Changes in the summed voltage with respect to a reference voltage are counted to determine the speed of a rotating shaft having magnets or a similar arrangement.

Claims

1. A method for sensing a magnetic field with at least one Hall effect sensor connected to a Hall effect sensing circuit, the method comprising the steps of:

applying a drive current to the at least one Hall effect sensor during a first phase;

sampling a sensed phase one voltage for the at least one Hall effect sensor during the first phase;

providing the sensed phase one voltage to an amplifier;

outputting from the amplifier a positive voltage output of the sensed phase one voltage and a negative voltage output of the sensed phase one voltage to a hold circuit during the first phase, the positive voltage output and the negative voltage output corresponding to a magnetic field strength value and a Hall effect sensor and amplifier offset error value;

switching terminals of the at least one Hall effect sensor and applying the drive current to different terminals of the at least one Hall effect sensor to begin a second phase;

sampling a sensed phase two voltage for the at least one Hall effect sensor during the second phase at the different terminals of the at least one Hall effect sensor than during the first phase;

providing the sensed phase two voltage to the amplifier;

outputting from the amplifier a positive voltage output of the sensed phase two voltage and a negative voltage output of the sensed phase two voltage to the hold circuit during the second phase, the positive voltage output and the negative voltage output corresponding to a magnetic field strength value and a Hall effect sensor and amplifier offset error value; and

summing the positive output and negative output voltages from the first phase with the positive output and negative output voltages from the second phase to remove the Hall effect sensor and amplifier offset error value and to obtain a summed voltage corresponding to a summed magnetic field strength value.

2. The method according to claim 1, with the at least one hall effect sensor comprising a first one of at least one pair of Hall effect sensors, wherein the summed magnetic field strength value corresponds to the Hall voltage of the first one of the pair of Hall effect sensors added to the Hall voltage of the second one of the pair of Hall effect sensors.

3. The method according to claim 1, wherein the summed magnetic field strength value is four times the actual magnetic field strength value.

4. The method according to claim 1, wherein the at least one Hall effect sensor comprises a first one of at least one pair of Hall effect sensors, wherein the summed magnetic field strength value corresponds to the Hall voltage of the first one of the pair of Hall effect sensors subtracted by the Hall voltage of the second one of the pair of Hall effect sensors.

5. The method according to claim 1, including the steps of subsequent to obtaining the summed magnetic field strength value:

holding the summed voltage corresponding to the summed magnetic field strength value for a next first phase, and

switching the terminals of the Hall effect sensor to correspond to the terminals of the first phase and applying the drive current to the at least one Hall effect sensor for repeating the first phase, and

wherein repeating the first phase includes repeating the steps of;

sampling a sensed phase one voltage for the at least one Hall effect sensor during the first phase;

providing the sensed phase one voltage to an amplifier; and

outputting from the amplifier a positive voltage output of the sensed phase one voltage and a negative voltage output of the sensed phase one voltage to the hold circuit during the first phase, the positive voltage output and the negative voltage output corresponding to a magnetic field strength value and a Hall effect sensor and amplifier offset error value.

6. The method of claim 1, wherein switching the terminals of the Hall effect sensors comprises switching the terminals at a switching frequency of 200,000 Hz.

7. The method of claim 2, wherein the at least one pair of Hall effect sensors comprises one of between two or more pairs of the Hall effect sensors, and wherein the summed voltages of the pairs of the Hall effect sensors are combined.

8. The method of claim 1, wherein the step of outputting from the amplifier a positive voltage output of the sensed phase two voltage and a negative voltage output of the sensed phase two voltage to the hold circuit during the second phase comprises:

switching the positive voltage output and the negative voltage output so the negative voltage output during the second phase is provided to a first input of the hold circuit that receives the positive voltage output during the first phase and so that the positive voltage output during the second phase is provided to a second input of the hold circuit that receives the negative voltage output during the first phase; and

wherein the step of summing the positive output and negative output voltages from the first phase with the positive output and negative output voltages from the second phase to remove the Hall effect sensor and amplifier offset error value and to obtain a summed voltage corresponding to a summed magnetic field strength value comprises;

providing the voltage from the first input of the hold circuit to a negative input of an operational amplifier;

providing the voltage from the second input of the hold circuit to a positive input of the operational amplifier; and

providing the summed voltage corresponding to the summed magnetic field strength value as an output of the operational amplifier.

9. A method for sensing a magnetic field with at least one pair of Hall effect sensors connected to a Hall effect sensing circuit, the method comprising the steps of:

applying a drive current to the at least one pair of Hall effect sensors during a first phase;

sampling a sensed voltage for each of the Hall effect sensors during the first phase;

combining the sensed voltage from the Hall effect sensors during the first phase to obtain a first combined sensed voltage corresponding to a magnetic field strength value and a Hall effect sensor and amplifier offset error value;

providing the first combined sensed voltage to a hold circuit switching terminals of the Hall effect sensors and applying the drive current to different terminals of the at least one pair of Hall effect sensors to begin a second phase;

sampling a sensed voltage for each of the Hall effect sensors during the second phase at different terminals of the at least one pair of Hall effect sensors than during the first phase;

combining the sensed voltage from the Hall effect sensors during the second phase to obtain a second combined sensed voltage corresponding to a magnetic field strength value and Hall effect sensor and amplifier offset error value,

providing the second combined sensed voltage to the hold circuit, and

summing the first combined sensed voltage from the first phase with the second combined sensed voltage during the second phase to remove the Hall effect sensor and amplifier offset error value and to obtain a summed voltage corresponding to a summed magnetic field strength value.

10. The method according to claim 9, wherein the summed magnetic field strength value corresponds to the Hall voltage of a first one of the pair of Hall effect sensors added to the Hall voltage of the second one of the pair of Hall effect sensors.

11. The method according to claim 10, wherein the summed magnetic field strength value is four times the actual magnetic field strength value.

12. The method according to claim 9, wherein the summed magnetic field strength value corresponds to the Hall voltage of a first one of the pair of Hall effect sensors subtracted by the Hall voltage of the second one of the pair of Hall effect sensors.

13. The method according to claim 9, including the steps of subsequent to obtaining the summed magnetic field strength value:

holding the combined sensed voltage for a next first phase, and

switching the terminals of the Hall effect sensors to correspond to the terminals of the first phase and applying the drive current to the at least one pair of Hall effect sensors for repeating the first phase, and wherein repeating the first phase includes repeating the steps of;

sampling the sensed voltage for each of the Hall effect sensors during the first phase, and

combining the sensed voltages from the Hall effect sensors during the first phase to obtain the first combined voltage corresponding to a magnetic field strength value and a Hall effect sensor and amplifier offset error value.

14. The method of claim 9, wherein switching the terminals of the Hall effect sensors comprises switching the terminals at a switching frequency of 200,000 Hz.

15. The method of claim 10, wherein the at least one pair of Hall effect sensors comprises one of between two or more pairs of the Hall effect sensors, and wherein the sensed voltages of the pairs of the Hall effect sensors are combined.

16. A Hall effect sensing circuit arrangement comprising:

first and second Hall effect sensors having terminals;

first and second amplifiers;

a first switching unit configured to selectively connect the terminals of the first Hall effect sensor to inputs of the first amplifier, and the first switching unit configured to selectively connect the terminals of the second Hall effect sensor to inputs of the second amplifier;

first and second adders for receiving outputs from the first and second amplifiers;

a second switching unit configured to connect an output of the first adder to a hold circuit and alternately to connect an output of the second adder to the hold circuit, wherein the hold circuit comprises capacitors and switches;

an output amplifier for receiving a voltage input from the hold circuit and the adders to obtain a combined sensed voltage, and

a controller configured to control the first switching unit and the second switching unit,

wherein the controller is configured to;

operate the sensing circuit arrangement in a first phase and a second phase by periodically changing a state of the first switching unit and the second switching unit, and change a state of switches in the hold circuit when switching between the first phase and the second phase, the changing of the state of switches in the hold circuit occurring essentially simultaneously with the changing of the states of the first switching unit and the second switching unit.

17. The sensing circuit arrangement of claim 16, wherein the sensing circuit arrangement determines the combined sensed voltage from the first phase and the second phase and removes a Hall effect sensor and amplifier offset error value, the combined sensed voltage comprising a summed voltage corresponding to a summed magnetic field strength value for the pair of Hall effect sensors.

18. The sensing circuit of claim 17, wherein the summed magnetic field strength value corresponds to a Hall voltage of the first Hall effect sensor added to a Hall voltage of the second Hall effect sensor.

19. The sensing circuit of claim 17, wherein the summed magnetic field strength value corresponds to a Hall voltage of the first Hall effect sensor subtracted from a Hall voltage of the second Hall effect sensor.

20. The sensing circuit arrangement of claim 16, wherein the first adder receives a positive output from the first amplifier and a negative output from the second amplifier, and wherein the second adder receives a positive output from the second amplifier and a negative output from the first amplifier.

21. The sensing circuit arrangement of claim 16, wherein the first adder receives a positive output from the first amplifier and a positive output from the second amplifier, and wherein the second adder receives a negative output from the second amplifier and a negative output from the first amplifier.

22. The sensing circuit arrangement of claim 16, wherein the sensing circuit arrangement is free from a low pass filter.

23. The sensing circuit arrangement of claim 16, wherein the first and second Hall effect sensors comprise one pair of between two or more pairs of the Hall effect sensors, and wherein the sensed voltages of the pairs of the Hall effect sensors are combined.

24. The sensing circuit arrangement of claim 16, further comprising a comparator having a first input for receiving a reference voltage and a second input for receiving the output of the output amplifier.

25. The sensing circuit arrangement of claim 16, wherein the first adder provides a first adder voltage output during the first phase of Vp(phase one)=(Vhall1−

Vhall2)+(Voffset1−

Voffset2), wherein Vp(phase one) represents the added voltage output of the first adder, Vhall1 is the Hall voltage value and Voffset1 is a voltage offset value of the sensed voltage of the first Hall effect sensor during the first phase, and wherein Vhall2 is the Hall voltage value and Voffset2 is a voltage offset value of the sensed voltage of the second Hall effect sensor during the first phase.

26. The sensing circuit arrangement of claim 25, wherein the second adder provides a second adder voltage output during the first phase of Vn(phase one)=−

(Vhall1−

Vhall2)−

(Voffset1−

Voffset2), wherein Vn represents the added voltage output of the second adder, and Vhall1 is the Hall voltage value and Voffset1 is a voltage offset value of the sensed voltage of the first Hall effect sensor during the first phase, and wherein Vhall2 is the Hall voltage value and Voffset2 is a voltage offset value of the sensed voltage of the second Hall effect sensor during the first phase.

27. The sensing circuit arrangement of claim 26, wherein the first adder provides a first adder voltage output during the second phase of Vp(phase two)=−

(Vhall1 Vhall2)+(Voffset1−

Voffset2), wherein Vp(phase two) represents the added voltage output of the first adder during the second phase, Vhall1 is the Hall voltage value and Voffset1 is a voltage offset value of the sensed voltage of the first Hall effect sensor during the second phase, and wherein Vhall2 is the Hall voltage value and Voffset2 is a voltage offset value of the sensed voltage of the second Hall effect sensor during the second phase.

28. The sensing circuit arrangement of claim 27, wherein the second adder provides a second adder voltage output during the second phase of Vn(phase two)=(Vhall1−

Vhall2)−

(Voffset1−

Voffset2), wherein Vn(phases two) represents the added voltage output of the second adder during the second phase, and Vhall1 is the Hall voltage value and Voffset1 is a voltage offset value of the sensed voltage of the first Hall effect sensor during the second phase, and wherein Vhall2 is the Hall voltage value and Voffset2 is a voltage offset value of the sensed voltage of the second Hall effect sensor during the second phase.

29. The sensing circuit arrangement of claim 28, wherein during the second phase, the hold circuit is charged to correspond to a value of Voutput=−

(Vp(phase one)−

Vn(phase one))−

(Vn(phase two)−

Vp(phase two)).

30. The sensing circuit arrangement of claim 16, wherein the first adder provides an adder voltage output during the first phase of Vp(phase one)=(Vhall1+Vhall2)+(Voffset1+Voffset2), wherein Vp(phase one) represents the added voltage output of the first adder, Vhall1 is the Hall voltage value and Voffset1 is a voltage offset value of the sensed voltage of the first Hall effect sensor during the first phase, and wherein Vhall2 is the Hall voltage value and Voffset2 is a voltage offset value of the sensed voltage of the second Hall effect sensor during the first phase.