Hybrid thin film transistor structure, display device, and method of making the same

• US 10,468,434 B2
• Filed: 02/17/2017
• Issued: 11/05/2019
• Est. Priority Date: 04/08/2016
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: InnoLux Corporation
• Inventors: Lee, Kuan-feng, Lius, Chandra, Hsu, Nai-Fang
• Primary Examiner(s): Karimy, Timor
• Application Number:
  US15/436,073
• Publication Number:
  US 20170294456A1
• Time in Patent Office: 991 Days
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/51 Insulating materials associated therewith for MIS structures on thin film semiconductor H01L29/4908
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A display device, and method for manufacture, having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. A material of the first active layer is different than a material of the second active layer, and a hydrogen concentration of the second gate insulator is different from a hydrogen concentration of the first gate insulator.

Claims

1. A display device, comprising:

a substrate having a surface;

a first thin film transistor (TFT) on said substrate, said first thin film transistor comprising a first active layer, a first gate insulator, and a first gate electrode, wherein said first thin film transistor is adjacent to said surface;

a second thin film transistor (TFT) on said substrate, said second thin film transistor comprising a second active layer, a second gate insulator and a second gate electrode;

wherein said first gate insulator is disposed between said first gate electrode and said first active layer;

wherein a material of said first active layer is different from a material of said second active layer;

wherein a hydrogen concentration of said second gate insulator is different from a hydrogen concentration of said first gate insulator; and

a buffer layer disposed between said first active layer and said second active layer, wherein said second active layer, said buffer layer and said first active layer are sequentially disposed on said substrate along a direction perpendicular to said surface of said substrate, comprising;

a first sublayer disposed on said second active layer; and

a second sublayer disposed on said first sublayer,

wherein said second gate insulator is disposed between said second gate electrode and said second active layer, and disposed above the first sublayer.

2. The display device according to claim 1, wherein said material of said second active layer comprises metal oxide.

3. The display device according to claim 1, wherein said hydrogen concentration of said second gate insulator is less than or equal to 5 atomic percent and greater than or equal to 0 atomic percent.

4. The display device according to claim 3, wherein said hydrogen concentration of said first gate insulator is greater than 5 atomic percent and less than 10 atomic percent.

5. The display device according to claim 1, wherein a material of said first gate insulator comprises at least one of silicon oxide, silicon nitride, and silicon oxynitride, and a material of said second gate insulator comprises at least one of silicon oxide and silicon oxynitride.

6. The display device according to claim 1, wherein said first gate insulator and said second gate insulator overlap.

7. A display device, comprising:

a substrate having a surface;

a first thin film transistor (TFT) on said substrate, said first thin film transistor comprising a first active layer, a first gate insulator and a first gate electrode, wherein said first thin film transistor is adjacent to said surface;

a second thin film transistor (TFT) on said substrate, said second thin film transistor comprising a second active layer, a second gate insulator and a second gate electrode;

wherein said first gate insulator is disposed between said first gate electrode and said first active layer;

wherein a material of said first active layer is different from a material of said second active layer, and a material of said first gate insulator is different from a material of said second gate insulator;

wherein said material of said second active layer comprises metal oxide and said material of said second gate insulator comprises silicon oxide; and

a buffer layer disposed between said first active layer and said second active layer, wherein said second active layer, said buffer layer and said first active layer are sequentially disposed on said substrate along a direction perpendicular to said surface of said substrate, comprising;

a first sublayer disposed on said second active layer; and

a second sublayer disposed on said first sublayer,

wherein said second gate insulator is disposed between said second gate electrode and said second active layer, and disposed above the first sublayer.

8. The display device according to claim 7, wherein a hydrogen concentration of said second gate insulator is less than a hydrogen concentration of said first gate insulator.

9. The display device according to claim 8, wherein said hydrogen concentration of said second gate insulator is less than or equal to 5 atomic percent and greater than or equal to 0 atomic percent.

10. The display device according to claim 9, wherein said hydrogen concentration of said first gate insulator is greater than 5 atomic percent and less than 10 atomic percent.

11. The display device according to claim 7, further comprising a blanking layer disposed between said second active layer and said substrate.

12. The display device according to claim 7, wherein said second thin film transistor further comprises a third gate electrode, wherein said second gate electrode is disposed above said second active layer and said third gate electrode is disposed below said second active layer.

13. The display device according to claim 7, wherein said first gate insulator and said second gate insulator overlap.