Data storage device and data erasing method wherein after erasing process, predetermined value is written to indicate completion of said erasing method

• US 10,475,516 B2
• Filed: 09/29/2014
• Issued: 11/12/2019
• Est. Priority Date: 12/09/2013
• Status: Active Grant

• Current Assignee: Silicon Motion Incorporated California (Silicon Motion)
• Original Assignee: Silicon Motion Incorporated California (Silicon Motion)
• Inventors: Chuang, Chia-Hao
• Primary Examiner(s): Faal, Baboucarr
• Assistant Examiner(s): Yew, Chie
• Application Number:
  US14/499,511
• Publication Number:
  US 20150161040A1
• Time in Patent Office: 1,870 Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G11C 16/16 for erasing blocks, e.g. arrays, words, groups

Abstract

The present invention provides a data-storage device. The data-storage device includes a flash memory and a controller. The flash memory includes a plurality of blocks, and each of the blocks includes a plurality of pages. The controller is arranged to receive an erase signal from a host, and enable the flash memory to sequentially execute an erasing process on at least one first block of the blocks in response to the erase signal, wherein a specific page of the first block has been written by a predetermined value and the other pages of the first block in exception to the specific page have been erased after the erasing process executed on the first block is completed.

Claims

1. A data-storage device, comprising:

a flash memory, comprising a plurality of blocks, wherein each of the plurality of blocks comprises a plurality of pages; and

a controller, arranged to receive an erase signal from a host, and enable the flash memory to execute an erasing process on at least one first block of the plurality of blocks in response to the erase signal, wherein the erase signal comprises a predetermined value that is different from 0xFF used in the erasing process, wherein in the erasing process executed on the first block, the controller erases each of the plurality of pages of the first block and also writes the predetermined value into a specific page of the first block after the first block is erased,

wherein each of the plurality of pages of each of the plurality of blocks has a logical address and a physical address, and the data-storage device further comprises at least one mapping table arranged to store the corresponding relationships between the logical addresses and the physical addresses of the plurality of pages, wherein the logical addresses of all the plurality of pages of the first block are mapped to the physical address of the specific page of the first block in the mapping table, such that data read out from either of the logical addresses corresponding to the plurality of pages of the first block is the predetermined value, wherein the host determines that the erasing process executed on the first block is completed based upon reading the predetermined value from either of the logical addresses corresponding to the plurality of pages of the first block.

2. The data-storage device as claimed in claim 1, wherein the erase signal is produced by a hardware switch.

3. The data-storage device as claimed in claim 1, wherein the erase signal is a purge command.

4. The data-storage device as claimed in claim 1, wherein the erase signal is an enhanced erase command.

5. The data-storage device as claimed in claim 1, wherein the predetermined value is a hexadecimal value of 0x21.

6. The data-storage device as claimed in claim 1, wherein the controller only writes the predetermined value into the specific page of the first block.

7. A data erasing method, applied to a data-storage device, wherein the data-storage device comprises a flash memory, the flash memory comprises a plurality of blocks, and the data erasing method comprises:

executing an erasing process on the first block in response to an erase signal, wherein the erase signal comprises a predetermined value that is different from 0xFF used in the erasing process;

erasing each of pages of the first block and also writing the predetermined value into a specific page of the first block after the first block is erased in the erasing process, wherein each of the pages of the first block has a logical address and a physical address, and the data-storage device further comprises at least one mapping table arranged to store the corresponding relationships between the logical addresses and the physical addresses of the pages;

updating the mapping table to map the logical addresses of all the pages of the first block to the physical address of the specific page of the first block, such that data read out from either of the logical addresses corresponding to the pages of the first block is the predetermined value; and

determining that the erasing process executed on the first block is completed based upon reading the predetermined value from either of the pages of the first block.

8. The data erasing method as claimed in claim 7, further comprising repeating the steps of erasing data of other blocks within the plurality of blocks, writing the predetermined value and updating the mapping table until all of the plurality of blocks of the flash memory are erased.

9. The data erasing method as claimed in claim 7, wherein the erase signal is produced by a hardware switch.

10. The data erasing method as claimed in claim 7, wherein the erase signal is a purge command.

11. The data erasing method as claimed in claim 7, wherein the erase signal is an enhanced erase command.

12. The data erasing method as claimed in claim 7, wherein the predetermined value is a hexadecimal value of 0x21.

13. The data erasing method as claimed in claim 7, wherein the predetermined value is only written into the specific page of the first block.