Efficient front end module

• US 10,476,541 B2
• Filed: 06/28/2018
• Issued: 11/12/2019
• Est. Priority Date: 07/03/2017
• Status: Active Grant

• Current Assignee: Kyocera AVX Components San Diego Inc (Kyocera Corporation)
• Original Assignee: Ethertronics, Inc. (Kyocera Corporation)
• Inventors: Manian, Vahid, Eslami, Hamid, Dzhandzhapanyan, Norik
• Primary Examiner(s): Akinyemi, Ajibola A
• Application Number:
  US16/021,299
• Publication Number:
  US 20190007080A1
• Time in Patent Office: 502 Days
• Field of Search: 4551931
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03M 1/00 Analogue/digital conversion; Digital/analogue conversion conversion of analogue values to or from differential modulation H03M3/00
• CPC Class Codes: H04B 1/0007 wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/18 Input circuits, e.g. for coupling to an antenna or a transmission line coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H
• CPC Class Codes: H04B 1/44 Transmit/receive switching
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

Example aspects of the present disclosure are directed to front end modules for use in communication systems. In one example aspect, a front end module can include a receive path. The receive path can include a low noise amplifier. The receive path can include an analog to digital converter (ADC) circuit operable to receive an analog signal from the low noise amplifier and convert the analog signal to a digital RF receive signal. The receive path can include an ADC post processing circuit operable to process the digital RF receive signal in the digital domain. The front end module can include a transmit path. The transmit path can include a digital to analog converter circuit operable to convert the digital RF transmit signal to an analog RF transmit signal. The transmit path can include a power amplifier.

Claims

1. A front end module comprising:

a receive path, the receive path comprising;

a plurality of low noise amplifiers, each of the plurality of low noise amplifiers operable to receive an RF signal from an antenna;

an analog to digital converter (ADC) circuit operable to receive an analog signal from the plurality of low noise amplifiers and convert the analog signal to a digital RF receive signal;

an ADC post processing circuit operable to process the digital RF receive signal in the digital domain;

a digital down converter circuit operable to convert the digital RF receive signal to a digital baseband receive signal;

a transmit path, the transmit path comprising;

a digital up converter circuit operable to convert the digital baseband transmit signal to a digital RF transmit signal;

a digital to analog converter circuit operable to convert the digital RF transmit signal to an analog RF transmit signal;

a plurality of power amplifiers, each of the plurality of power amplifiers configured to provide the analog RF transmit signal to the antenna;

wherein the ADC circuit comprises a multi-channel ADC circuit having M discrete ADC circuits, the M discrete ADC circuits operable to convert analog RF signals across a span of about 800 MHz or greater in the 5 GHz band;

wherein the receive path further comprises a multiplexer circuit configured to distribute a plurality of N inputs among the M discrete ADC circuits, each of the plurality of N inputs associated with a different low noise amplifier of the plurality of low noise amplifiers, each of the plurality of low noise amplifiers associated with a different frequency band in the 5 GHz band;

wherein the DAC circuit comprises a multi-channel DAC circuit having M discrete DAC circuits, the transmit path further comprising a multiplexer circuit configured to distribute a plurality of N inputs among the M discrete DAC circuits;

where each of the M discrete DAC circuits is associated with a different power amplifier of the plurality of power amplifiers, each of the plurality of power amplifiers associated with a different frequency band in the 5 GHz band.

2. The front end module of claim 1, wherein the ADC circuit is a gigabit ADC circuit.

3. The front end module of claim 1, wherein the DAC circuit is operable to provide digital to analog conversion of signals across a span of 800 MHz or greater in the 5 GHz band.

4. The front end module of claim 1, wherein the ADC post processing circuit is configured to process the digital RF signal to provide phase adjustment, amplitude adjustment, or jitter cancellation.

5. The front end module of claim 1, wherein the transmit path further comprises a pre-distortion processing circuit configured to process the digital baseband transmit signals to pre-compensate for non-linearity of the plurality of power amplifiers.

6. The front end module of claim 1, wherein the front end module further comprises an envelope tracker configured to control power delivery to the plurality of power amplifiers.

7. The front end module of claim 1, wherein the front end module further comprises a calibration engine operable to control one or more gains associated with the plurality of low noise amplifiers.

8. The front end module of claim 1, wherein each of the plurality of low noise amplifiers is associated with a different antenna of a plurality of antennas.

9. The front end module of claim 1, wherein each of the plurality of power amplifiers is associated with a different antenna of a plurality of antennas.

10. The front end module of claim 1, wherein the antenna comprises a modal antenna operable in a plurality of different modes, each mode associated with a different radiation pattern or polarization state.

11. The front end module of claim 10, wherein the front end module comprises an active element configured to control one or more electrical characteristics associated with a parasitic element for the modal antenna.

12. A front end module having a transmit path, the transmit path comprising:

a pre-distortion processing circuit configured to process one or more digital baseband transmit signals to pre-compensate for non-linearity of a plurality of power amplifiers;

a digital up converter circuit operable to convert the digital baseband transmit signal to a digital RF transmit signal;

a digital to analog converter (DAC) circuit operable to convert the digital RF transmit signal to an analog RF transmit signal, wherein the DAC circuit comprises a multi-channel DAC circuit having M discrete DAC circuits, each of the M discrete DAC circuits operable for digital to analog conversion of signals across a span of 800 MHz or greater in the 5 GHz band;

an DAC post processing circuit is configured to process the analog RF transmit signal to provide phase adjustment, amplitude adjustment, or jitter cancellation; and

a multiplexer circuit configured to distribute a plurality of N inputs among the M discrete DAC circuits;

where each of the M discrete DAC circuits is associated with a different power amplifier of the plurality of power amplifiers, each of the plurality of power amplifiers associated with a different frequency band in the 5 GHz band.

13. A front end module having a receive path, the receive path comprising:

a plurality of low noise amplifiers, each of the plurality of low noise amplifiers operable to receive an RF signal from an antenna;

an analog to digital conversion (ADC) circuit operable to receive an analog signal from the plurality of low noise amplifiers and convert the analog signal to a digital RF receive signal, wherein the ADC circuit comprises a multi-channel ADC circuit having M discrete ADC circuits, each of the M discrete ADC circuits operable to convert analog RF signals across a span of about 800 MHz or greater in the 5 GHz band;

an ADC post processing circuit operable to process the digital RF receive signal in the digital domain to provide phase adjustment, amplitude adjustment, or jitter cancellation;

a digital down converter circuit operable to convert the digital RF receive signal to a digital baseband receive signal; and

a multiplexer circuit configured to distribute a plurality of N inputs among the M discrete ADC circuits, each of the plurality of N inputs associated with a different low noise amplifier of the plurality of low noise amplifiers, each of the plurality of low noise amplifiers associated with a different frequency band in the 5 GHz band.