Solid-state imaging sensor and solid-state imaging device
First Claim
Patent Images
1. A solid-state image sensor comprising:
- a selection signal terminal configured to receive a selection signal designated by a pixel address in a two-dimensionally arranged pixel array, wherein the selection signal includes a horizontal address signal and a vertical address signal;
a photoelectric conversion section configured to generate a charge in accordance with incident light and store the charge in accordance with the selection signal;
a charge retention section configured to retain the charge stored in the photoelectric conversion section at a prescribed timing; and
a charge release section configured to release the charge stored in the photoelectric conversion section when the horizontal address signal and the vertical address signal are both effective, wherein the charge release section includes a first transistor and a second transistor connected in series between a power source and the photoelectric conversion section, wherein the first transistor has the horizontal address signal applied thereto and conducts when the horizontal address signal is effective and wherein the second transistor has the vertical address signal applied thereto and conducts when the vertical address signal is effective.
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Accused Products
Abstract
There is provided a solid-state image sensor including: a selection signal terminal configured to receive a selection signal designated by a pixel address in a two-dimensionally arranged pixel array; a photoelectric conversion section configured to generate a charge in accordance with incident light and store the charge in accordance with the selection signal; and a charge retention section configured to retain the charge stored in the photoelectric conversion section at a prescribed timing.
14 Citations
9 Claims
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1. A solid-state image sensor comprising:
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a selection signal terminal configured to receive a selection signal designated by a pixel address in a two-dimensionally arranged pixel array, wherein the selection signal includes a horizontal address signal and a vertical address signal; a photoelectric conversion section configured to generate a charge in accordance with incident light and store the charge in accordance with the selection signal; a charge retention section configured to retain the charge stored in the photoelectric conversion section at a prescribed timing; and a charge release section configured to release the charge stored in the photoelectric conversion section when the horizontal address signal and the vertical address signal are both effective, wherein the charge release section includes a first transistor and a second transistor connected in series between a power source and the photoelectric conversion section, wherein the first transistor has the horizontal address signal applied thereto and conducts when the horizontal address signal is effective and wherein the second transistor has the vertical address signal applied thereto and conducts when the vertical address signal is effective. - View Dependent Claims (2, 3, 4, 5)
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6. A solid-state imaging device comprising:
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a pixel array in which a plurality of pixels each configured to convert incident light to a pixel signal are two-dimensionally arranged; an exposure control circuit configured to supply a selection signal that designates one of the plurality of pixels and control exposure in the designated pixel; and a reading circuit configured to read the pixel signal from each of the plurality of pixels, wherein each of the plurality of pixels includes a selection signal terminal configured to receive the selection signal, wherein the selection signal includes a horizontal address signal and a vertical address signal, a photoelectric conversion section configured to generate and store a charge in accordance with the incident light, a charge release section configured to release the charge stored in the photoelectric conversion section when the horizontal address signal and the vertical address signal are both effective, wherein the charge release section includes a first transistor and a second transistor connected in series between a power source and the photoelectric conversion section, wherein the first transistor has the horizontal address signal applied thereto and conducts when the horizontal address signal is effective and wherein the second transistor has the vertical address signal applied thereto and conducts when the vertical address signal is effective, a charge retention section configured to retain the charge stored in the photoelectric conversion section at a prescribed timing, and a charge/voltage conversion section configured to store the charge retained in the charge retention section in order to convert the charge to the pixel signal that is a voltage signal. - View Dependent Claims (7, 8, 9)
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Specification