Method of producing display panel board

• US 10,481,453 B2
• Filed: 09/07/2018
• Issued: 11/19/2019
• Est. Priority Date: 09/13/2017
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Hara, Yoshihito, Daitoh, Tohru, Imai, Hajime, Maeda, Masaki, Kitagawa, Hideki, Itoh, Toshikatsu, Kawasaki, Tatsuya
• Primary Examiner(s): Kusumakar, Karen
• Application Number:
  US16/124,223
• Publication Number:
  US 20190079364A1
• Time in Patent Office: 438 Days
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 33/0083 for devices with an active region comprising only II-VI compounds
• CPC Class Codes: H01L 33/28 containing only elements of Group II and Group VI of the Periodic Table
• CPC Class Codes: H01L 33/42 Transparent materials

Abstract

A method includes a pixel electrode forming process of forming a pixel electrode formed from a transparent electrode film on a gate insulation film that covers a gate electrode, a semiconductor film forming process being performed after the pixel electrode forming process and forming a semiconductor film on the gate insulation film such that a part of the semiconductor film covers the pixel electrode, an annealing process being performed after the semiconductor film forming process and processing the semiconductor film with annealing, and an etching process being performed after the annealing process and processing the semiconductor film with etching such that a channel section overlapping the gate electrode is formed in a same layer as the pixel electrode. The etching and the annealing performed on one of the transparent electrode film and the semiconductor film is less likely to adversely affect another one of the films.

Claims

1. A method of producing a display panel board comprising:

a pixel electrode forming process of forming a pixel electrode formed from a transparent electrode film on a gate insulation film that covers a gate electrode;

a semiconductor film forming process of forming a semiconductor film on the gate insulation film such that a part of the semiconductor film covers the pixel electrode, the semiconductor film forming process being performed after the pixel electrode forming process;

an annealing process of processing the semiconductor film with annealing, the annealing process being performed after the semiconductor film forming process; and

an etching process of processing the semiconductor film with etching such that a channel section overlapping the gate electrode is formed in a same layer as the pixel electrode, the etching process being performed after the annealing process.

2. The method according to claim 1, wherein

the transparent electrode film is formed from indium tin oxide (ITO), and

the semiconductor film is formed from an oxide semiconductor containing indium (In), gallium (Ga), zinc (Zn), and oxygen (O).

3. The method according to claim 2, wherein in the annealing process, the annealing treatment is performed at a temperature from 350°

C. to 450°

C.

4. The method according to claim 1, further comprising a drain forming process of forming a drain electrode and a drain line that connect the channel section and the pixel electrode, the drain forming process being performed after the etching process.