Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage
First Claim
1. An integrated circuit comprising:
- a logic circuit in a first voltage domain, the first voltage domain corresponding to a first power supply voltage having a first power supply voltage value during use;
a memory circuit in a second voltage domain corresponding to a second power supply voltage having a second power supply voltage value different from the first power supply voltage value for at least some operation during use, the memory circuit comprising a plurality of memory cells, wherein the logic circuit accesses data in the memory circuit; and
an interface circuit between the first voltage domain and the second voltage domain, wherein the interface circuit converts one or more inputs to the memory circuit from the logic circuit from the first voltage domain to the second voltage domain.
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Abstract
In one embodiment, an integrated circuit includes at least one logic circuit supplied by a first supply voltage and at least one memory circuit coupled to the logic circuit and supplied by a second supply voltage. The memory circuit is configured to be read and written responsive to the logic circuit even if the first supply voltage is less than the second supply voltage during use. In another embodiment, a method includes a logic circuit reading a memory cell, the logic circuit supplied by a first supply voltage; and the memory cell responding to the read using signals that are referenced to the first supply voltage, wherein the memory cell is supplied with a second supply voltage that is greater than the first supply voltage during use.
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Citations
21 Claims
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1. An integrated circuit comprising:
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a logic circuit in a first voltage domain, the first voltage domain corresponding to a first power supply voltage having a first power supply voltage value during use; a memory circuit in a second voltage domain corresponding to a second power supply voltage having a second power supply voltage value different from the first power supply voltage value for at least some operation during use, the memory circuit comprising a plurality of memory cells, wherein the logic circuit accesses data in the memory circuit; and an interface circuit between the first voltage domain and the second voltage domain, wherein the interface circuit converts one or more inputs to the memory circuit from the logic circuit from the first voltage domain to the second voltage domain. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An integrated circuit comprising:
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a logic circuit in a first voltage domain, the first voltage domain corresponding to a first power supply and a first power supply voltage having a first power supply voltage value during use; a memory array comprising a plurality of memory cells, wherein the plurality of memory cells are in a second voltage domain corresponding to a second power supply voltage having a second power supply voltage value different from the first power supply voltage value at least for at least a subset of memory operations during use, and wherein the logic reads and writes data to the memory array; and an interface between the first and second voltage domains comprising level shifting circuitry, wherein the level shifting circuitry; converts voltage levels of one or more of address, timing, control, address, and input data output from the logic circuit and input to the memory array into voltage levels supplied to the plurality of memory cells, and; converts voltage levels of data output from the plurality of memory cells into voltage levels supplied to the logic circuit. - View Dependent Claims (13, 14, 15, 16)
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17. An integrated circuit comprising:
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first and second voltage inputs coupled to an external electrical energy source during use, the external electrical energy source providing at least a first voltage on the first voltage input during operation; and logic circuitry receiving electrical energy from the external electrical energy source during operation, a plurality of memory cells receiving electrical energy from the external electrical energy source during operation, and an interface circuit coupled to the logic circuitry and to the plurality of memory cells, wherein; the logic circuitry accesses data in the plurality of memory cells; the plurality of memory cells store data; the second voltage is different from the first voltage at least during some time intervals during operation; the interface circuitry is coupled to the first and second voltage inputs; the plurality of memory cells are operable from the second voltage; and the interface circuitry converts voltage levels of data output from the at least one of the plurality of memory cells operable from the second voltage to the voltage levels of the logic circuitry operable from the first voltage. - View Dependent Claims (18, 19, 20, 21)
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Specification