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Transceiver for communication and method for controlling communication

  • US 10,484,103 B2
  • Filed: 04/23/2019
  • Issued: 11/19/2019
  • Est. Priority Date: 03/14/2016
  • Status: Active Grant
First Claim
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1. A clock extension peripheral interface (CXPI) communication system, comprising:

  • a master circuit including a first transceiver, wherein the first transceiver is configured to generate a signal by modulating a timing signal;

    a communication bus; and

    a slave circuit including a second transceiver, wherein the second transceiver further includes;

    a first timing module configured to determine a first time based on a timing at which the signal received through the communication bus from the master circuit is detected to have started rising from a low level to a high level;

    a timing adjustment module configured to determine a second time based on the first time and a predetermined time difference value; and

    an encoder configured to extend a length of time of a combined signal on the communication bus is at the low level by pulling a data signal to be output to the master circuit through the communication bus from the high level to the low level at the second time.

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