Liquid crystal display device

• US 10,488,726 B2
• Filed: 05/25/2017
• Issued: 11/26/2019
• Est. Priority Date: 12/18/2009
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Song, Jang-Kun, Ham, Yeon-Sik, Kim, Kang-Woo, Jeon, Yeon-Mun, Lee, Jeong Hyun
• Primary Examiner(s): Nguyen, Hoan C
• Application Number:
  US15/604,721
• Publication Number:
  US 20170261829A1
• Time in Patent Office: 915 Days
• Field of Search: 349 43
• CPC Class Codes: G02F 1/1343 Electrodes reflective electrodes G02F1/133553
• CPC Class Codes: G02F 1/134336 Matrix
• CPC Class Codes: G02F 1/134345 Subdivided pixels, e.g. for grey scale or redundancy
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/134381 Hybrid switching mode, i.e. for applying an electric field with components parallel and orthogonal to the substrates
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/155 Electrodes
• CPC Class Codes: G02F 2001/1552 Inner electrode, e.g. the electrochromic layer being sandwiched between the inner electrode and the support substrate
• CPC Class Codes: G02F 2201/50 Protective arrangements

Abstract

A liquid crystal display device includes a first substrate, a second substrate facing the first substrate, a dual passivation layer disposed between the first substrate and the second substrate. The dual passivation layer includes a first passivation layer and a second passivation layer. A refractive index of the first passivation layer is different from a refractive index of the second passivation layer.

Claims

1. A liquid crystal display device comprising:

a first substrate;

a second substrate facing the first substrate;

a liquid crystal layer interposed between the first substrate and the second substrate;

a first gate line and a second gate line disposed on the first substrate and being substantially parallel to each other;

a first common voltage line and a second common voltage line being substantially parallel to the first gate line;

a first data line and a second data line crossing the first gate line and the second gate line and being substantially parallel to each other;

a first pixel electrode disposed in a first pixel;

a second pixel electrode disposed in a second pixel adjacent to the first pixel in a column direction parallel to the first and second data lines;

a common electrode disposed on the first substrate and overlapping the first pixel electrode and the second pixel electrode; and

an insulating layer between the first common voltage line and the common electrode and between the second common voltage line and the common electrode,

wherein

arranged in order along the column direction are the first gate line, the first common voltage line, the second pixel electrode, the second gate line and the second common voltage line, the first gate line and the first common voltage line being spaced apart from each other along the column direction to define a space therebetween,

the first common voltage line includes a length portion substantially parallel to the first gate line and the first common voltage line, and an expanded portion which protrudes directly from the length portion and at which the first common voltage line overlaps the common electrode,

a portion of the second pixel electrode overlaps the length portion of the first common voltage line and includes an edge of the second pixel electrode disposed in the space between the first gate line and the first common voltage line, the edge being substantially parallel to the first gate line and the first common voltage line, and

the portion of the second pixel electrode which overlaps the length portion of the first common voltage line and includes the edge is spaced apart from the expanded portion which protrudes directly from the length portion, along a direction substantially parallel to the first gate line and the first common voltage line.

2. The liquid crystal display device of claim 1, further comprising a thin film transistor connected to one gate line among the first gate line and the second gate line and one data line among the first data line and the second data line,

wherein for the one data line to which the thin film transistor is connected:

a source electrode of the thin film transistor is a first portion of the one data line,

a drain electrode of the thin film transistor parallels the one data line, and

a channel area of the thin film transistor is disposed between the source electrode and the drain electrode.

3. The liquid crystal display device of claim 2, wherein the common electrode comprises:

a first connection part disposed substantially parallel to the first date line and the second data line;

a second connection part disposed substantially parallel to the first gate line and the second gate line and connected to the first connection part; and

a branch electrode.

4. The liquid crystal display device of claim 3,

wherein the branch electrode comprises

a first part;

a second part connected to the first part; and

a third part connected to the first part and the second connection part,

wherein

the second part forms a first angle with the first part, and

the third part forms a second angle with the first part and a third angle with the second connection part.

5. The liquid crystal display device of claim 4, wherein

a second portion of the one data line extends directly from the first portion thereof, and

the first connection part of the common electrode overlaps the second portion of the one data line.

6. The liquid crystal display device of claim 5,

wherein a first opening is formed in the common electrode and overlaps the channel area between the source electrode and the drain electrode,

wherein a width of the first opening is larger than a width of the first portion of the one data line, and

wherein a second opening is formed in the first connection part of the common electrode and overlaps the second portion of the one data line.

7. The liquid crystal display device of claim 1, further comprising a shielding electrode disposed under the first data line and the second data line and on the first substrate and overlapping the first data line and the second data line.

8. The liquid crystal display of claim 1,

wherein the common electrode is connected to the first common voltage line and the second common voltage line through a first contact hole and a second contact hole, respectively, and

wherein the first contact hole and the second contact hole are disposed in a red pixel or a blue pixel.

9. The liquid crystal display device of claim 1, further comprising a dual passivation layer disposed between the common electrode and the first and second pixel electrodes, the dual passivation layer comprising:

a first passivation layer; and

a second passivation layer,

wherein a refractive index of the first passivation layer is different from a refractive index of the second passivation layer.

10. The liquid crystal display device of claim 9, wherein a nitrogen content of the first passivation layer is greater than a nitrogen content of the second passivation layer.

11. The liquid crystal display of claim 1,

wherein the first common voltage line is connected to the common electrode through a first contact hole disposed overlapping the expanded portion which protrudes directly from the length portion and at which the first common voltage line overlaps the common electrode, and

wherein the first contact hole is disposed in a red pixel or a blue pixel.

12. A liquid crystal display device comprising:

a first substrate;

a second substrate facing the first substrate;

a liquid crystal layer interposed between the first substrate and the second substrate;

a first gate line and a second gate line disposed on the first substrate and being substantially parallel to each other;

a first common voltage line and a second common voltage line being substantially parallel to the first gate line, each of the first common voltage line and the second common voltage line including a plurality of expanded portions;

a first data line and a second data line crossing the first gate line and the second gate line and being substantially parallel to each other;

a first pixel electrode disposed in a first pixel;

a second pixel electrode disposed in a second pixel adjacent to the first pixel in a column direction parallel to the first and second data lines;

a common electrode disposed on the first substrate and overlapping the first pixel electrode and the second pixel electrode;

a thin film transistor connected to one gate line among the first gate line and the second gate line and one data line among the first data line and the second data line, and

an insulating layer between the first common voltage line and the common electrode and between the second common voltage line and the common electrode,

wherein

arranged in order along the column direction are the first gate line, the first common voltage line, the second pixel electrode, the second gate line and the second common voltage line,

a portion of the second pixel electrode overlaps the first common voltage line,

the portion of the second pixel electrode which overlaps the first common voltage line includes an edge of the second pixel electrode disposed between the first gate line and the first common voltage line,

the edge of the portion of the second pixel electrode which is disposed between the first gate line and the first common voltage line is substantially parallel to the first gate line and the first common voltage line,

for the one data line to which the thin film transistor is connected;

a source electrode of the thin film transistor is a first portion of the one data line,

a second portion of the one data line extends directly from the first portion thereof,

a drain electrode of the thin film transistor parallels the one data line, and

a channel area of the thin film transistor is disposed between the source electrode and the drain electrode,

the common electrode comprises;

a first connection part disposed substantially parallel to the first date line and the second data line;

a second connection part disposed substantially parallel to the first gate line and the second gate line and connected to the first connection part; and

a branch electrode,

the first connection part of the common electrode overlaps the second portion of the one data line,

a first opening is formed in the common electrode and overlaps the channel area between the source electrode and the drain electrode,

a width of the first opening is larger than a width of the first portion of the one data line, and

the first opening of the common electrode is provided for each of the first and second pixels, the first openings respectively exposing a portion of the first and second pixel electrodes, in a plan view.

13. The liquid crystal display device of claim 12, wherein the branch electrode comprises

a first part;

a second part connected to the first part; and

a third part connected to the first part and the second connection part,

wherein

the second part forms a first angle with the first part, and

the third part forms a second angle with the first part and a third angle with the second connection part.

14. The liquid crystal display device of claim 13, wherein a second opening is formed in the first connection part of the common electrode and overlaps the second portion of the one data line.

15. A liquid crystal display device comprising:

a first substrate;

a second substrate facing the first substrate;

a liquid crystal layer interposed between the first substrate and the second substrate;

a first gate line and a second gate line disposed on the first substrate and being substantially parallel to each other;

a first common voltage line and a second common voltage line being substantially parallel to the first gate line, each of the first common voltage line and the second common voltage line including a plurality of expanded portions;

a first data line and a second data line crossing the first gate line and the second gate line and being substantially parallel to each other;

a first pixel electrode disposed in a first pixel;

a second pixel electrode disposed in a second pixel adjacent to the first pixel in a column direction parallel to the first and second data lines;

a common electrode disposed on the first substrate and overlapping the first pixel electrode and the second pixel electrode; and

an insulating layer between the first common voltage line and the common electrode and between the second common voltage line and the common electrode,

wherein

arranged in order along the column direction are the first gate line, the first common voltage line, the second pixel electrode, the second gate line and the second common voltage line,

a portion of the second pixel electrode overlaps the first common voltage line,

the portion of the second pixel electrode which overlaps the first common voltage line includes an edge of the second pixel electrode disposed between the first gate line and the first common voltage line, and

the edge of the portion of the second pixel electrode which is disposed between the first gate line and the first common voltage line is substantially parallel to the first gate line and the first common voltage line,

the common electrode is connected to the first common voltage line and the second common voltage line through a first contact hole and a second contact hole, respectively,

the first contact hole and the second contact hole are disposed in a red pixel or a blue pixel, and

the first contact hole and the second contact hole are respectively disposed in one pixel among three neighboring pixels.