Shift register circuit and touch display apparatus thereof

• US 10,488,967 B2
• Filed: 12/25/2017
• Issued: 11/26/2019
• Est. Priority Date: 12/23/2016
• Status: Active Grant

• Current Assignee: Hon Hai Precision Industry Co., Ltd.
• Original Assignee: Hon Hai Precision Industry Co., Ltd.
• Inventors: Sato, Hideo, Wu, Chi-Liang
• Primary Examiner(s): Edwards, Mark
• Application Number:
  US15/853,911
• Publication Number:
  US 20180181244A1
• Time in Patent Office: 701 Days
• CPC Class Codes: G06F 2203/04112 Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/04184 Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: G09G 2310/0264 Details of driving circuits
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence

Abstract

A shift register operates in a display period and a touch period in turn. The shift register circuit comprises a plurality of shift register units. Each shift register unit generates a pulse signal to a gate line, a following adjacent shift register unit, and an anterior adjacent shift register unit. Each shift register unit comprises a flip-flop (FF) circuit and an output circuit. The FF circuit controls potentials of an internal terminal and an internal inverted terminal based on a received a setting signal and a received reset signal. The output circuit generates the pulse signal related to a clock signal under a control of the internal terminal and the received internal inverted terminal. During the touch period, the potential of the internal terminal and the potential of the internal inverted terminal remain the same as the potential in the anterior display period.

Claims

1. A shift register circuit for providing scanning signals to a plurality of gate lines of a touch display device, the touch display device operating in a display period and a touch period in turn, the shift register circuit comprising:

a plurality of shift register units, each shift register units configured to output a pulse signal as a gate signal;

each shift register unit comprising;

a flip-flop (FF) circuit with an internal terminal and an internal inverted terminal, and configured to control potentials of the internal terminal and the internal inverted terminal based on a received setting signal and a received reset signal; and

an output circuit configured to generate the pulse signal related to a clock signal under a control of the internal terminal and the internal inverted terminal; and

wherein the output circuit comprises a pull-up transistor and a pull-down transistor;

a gate electrode of the pull-up transistor is electrically connected to the internal terminal, and a gate electrode of the pull-down transistor is electrically connected to the internal inverted terminal;

when the touch display device is operated from the display period to the touch period, the potential of the internal terminal and the potential of the internal inverted terminal remain the same as the potential in an anterior display period, which is the display period before the touch period;

each shift register unit further comprises a control circuit the control circuit clamps the potential of the internal terminal in a first level voltage and the internal inverted terminal in a low level voltage in the anterior display period during the touch period;

the FF circuit in each shift register unit is a dynamic FF circuit;

wherein the control circuit comprises a first switch and a second switch, a control terminal of the first switch is electrically connected to a first terminal of the first switch, and a control terminal of the fourth switch is electrically connected to a first terminal of the second switch, a first terminal of the first switch is electrically connected to the control terminal of the first switch, a first terminal of the second switch is electrically connected to the control terminal of the second switch, the first terminals of the first switch and the second switch receive the first touch signal respectively, a second terminal of the second switch is electrically connected to the gate electrode of the pull-up transistor, and a second terminal of the second switch is electrically connected to the gate electrode of the pull-down transistor.

2. The shift register circuit of claim 1, wherein the FF circuit is a static FF circuit, the FF circuit is configured to operate in a first state, a second state, or a hold state;

when the FF circuit operates in the first state, the potential of the internal terminal is in a high level voltage, and the potential of the internal inverted terminal is in a low level voltage;

when the FF circuit operates in the second state, the potential of the internal terminal is in the low level voltage, and the potential of the internal inverted terminal is in the high level voltage;

when the FF circuit operates in the hold state, the potentials of the internal terminal and the internal inverted terminal are constant to be same as a previous state;

the FF circuit is in the hold state during the touch period.

3. The shift register circuit of claim 2, wherein the FF circuit in the first shift register unit receives a scan start signal as the setting signal, and receives the pulse signal outputted by a following adjacent shift register unit as the reset signal;

and the FF circuit in each rest shift register unit receives the pulse signal outputted by a previous adjacent shift register unit as the setting signal, and receives the pulse signal outputted by a following adjacent shift register unit as the reset signal.

4. The shift register circuit of claim 3, wherein the FF circuit comprises a first static inverted circuit and a second static inverted circuit;

the first static inverted circuit receives the reset signal and resets the potential of the internal terminal to the low level voltage and the internal inverted terminal to the high level voltage;

the second static inverted circuit receives the set signal and sets the potential of the internal terminal to the first level voltage and the potential of the inverted signal to the low level voltage.

5. The shift register circuit of claim 3, wherein each of the first static inverted circuit and the second static inverted circuit comprises a first transistor, a second transistor, and a third transistor;

in the first static inverted circuit, the first transistor and the second transistor works as an inverter circuit, and the third transistor is served as a reset transistor;

in the second static inverted circuit, the first transistor and the second transistor works as an inverter circuit, and the third transistor is served as a set transistor.

6. The shift register circuit of claim 2, wherein the shift register circuit is a bidirectional shift register circuit, and is selectively operated in a forward direction and a reverse direction for sequentially applying the pulse signals to the gate lines;

each shift register unit receives two clock signal, a first scan start signal, and a second scan start signal;

one of the two clock signal is applied to the FF circuit as the reset signal, and the other of the two clock signal is applied to the output circuit.

7. The shift register circuit of claim 6, wherein when the shift register circuit operates in the forward direction, the first scan start signal is applied with a pulse signal;

when the shift register circuit operates in the reverse direction, the second scan start signal is applied with a pulse signal.

8. The shift register circuit of claim 6, wherein the FF circuit comprises a first static inverted circuit and a second static inverted circuit;

the first static inverted circuit receives the reset signal and resets the potential of the internal terminal to the low level voltage and the internal inverted terminal to the high level voltage;

the second static inverted circuit receives the set signal and sets the potential of the internal terminal to the first level voltage and the potential of the inverted signal to the low level voltage.

9. The shift register circuit of claim 1, wherein the control circuit further receives a second touch signal, the first touch signal is inverted with the second touch signal;

the second touch signal clamps the potential of the internal inverted terminal.

10. A touch display apparatus operating in a display period and a touch period in turn, the touch display apparatus comprising:

a plurality of gate lines located in a display region;

a plurality of data lines located in the display region and crossed with the gate lines to define a plurality of pixels; and

at least one gate driving circuit located in a non-display region surrounded with the display region, and configured to sequentially apply pulse signals to the gate lines for driving the pixel;

wherein each of the at least one gate driving circuit comprises a plurality of shift register units;

each shift register unit generates the pulse signal to the corresponding gate line as a gate signal, a following adjacent shift register unit, and an anterior adjacent shift register unit;

each shift register unit comprises a flip-flop (FF) circuit and an output circuit;

the FF circuit comprises an internal terminal and an internal inverted terminal;

the FF circuit controls potentials of the internal terminal and the internal inverted terminal based on a received a setting signal and a received reset signal, the output circuit generates the pulse signal related to a clock signal under a control of the internal terminal and the internal inverted terminal;

the output circuit comprises a pull-up transistor and a pull-down transistor;

a gate electrode of the pull-up transistor is electrically connected to the internal terminal, and a gate electrode of the pull-down transistor is electrically connected to the internal inverted terminal;

when the touch display apparatus is operated in the touch period, the potential of the internal terminal and the potential of the internal inverted terminal remain the same as the potential in an anterior display period, which is the display period before the touch period;

each shift register unit further comprises a control circuit the control circuit clamps the potential of the internal terminal in a first level voltage and the internal inverted terminal in a low level voltage in the anterior display period during the touch period;

the FF circuit in each shift register unit is a dynamic FF circuit;

wherein the control circuit comprises a first switch and a second switch, a control terminal of the first switch is electrically connected to a first terminal of the first switch, and a control terminal of the fourth switch is electrically connected to a first terminal of the second switch, a first terminal of the first switch is electrically connected to the control terminal of the first switch, a first terminal of the second switch is electrically connected to the control terminal of the second switch, the first terminals of the first switch and the second switch receive the first touch signal respectively, a second terminal of the second switch is electrically connected to the gate electrode of the pull-up transistor, and a second terminal of the second switch is electrically connected to the gate electrode of the pull-down transistor.

11. The touch display apparatus of claim 10, wherein the touch display apparatus comprises a first gate driving circuit and a second gate driving circuit, which are symmetrically located on opposite sides of the display region;

the first gate driving circuit applies the pulse signals to the gate lines in odd rows, the second gate driving circuit applies the pulse signals to the gate lines in even rows.

12. The touch display apparatus of claim 10, wherein the FF circuit is a static FF circuit, the FF circuit is configured to operate in a first state, a second state, or a hold state;

when the FF circuit operates in the first state, the potential of the internal terminal is in a high level voltage, and the potential of the internal inverted terminal is in a low level voltage;

when the FF circuit operates in the second state, the potential of the internal terminal is in the low level voltage, and the potential of the internal inverted terminal is in the high level voltage;

when the FF circuit operates in the hold state, the potentials of the internal terminal and the internal inverted terminal are constant to be same as a previous state;

the FF circuit is in the hold state during the touch period.

13. The touch display apparatus of claim 12, wherein the FF circuit in the first shift register unit receives a scan start signal as the setting signal, and receives the pulse signal outputted by a following adjacent shift register unit as the reset signal;

and the FF circuit in each rest shift register unit receives the pulse signal outputted by a previous adjacent shift register unit as the setting signal, and receives the pulse signal outputted by a following adjacent shift register unit as the reset signal.

14. The touch display apparatus of claim 13, wherein the FF circuit comprises a first static inverted circuit and a second static inverted circuit;

the first static inverted circuit receives the reset signal and resets the potential of the internal terminal to the low level voltage and the internal inverted terminal to the high level voltage;

the second static inverted circuit receives the set signal and sets the potential of the internal terminal to the first level voltage and the potential of the inverted signal to the low level voltage.

15. The touch display apparatus of claim 14, wherein each of the first static inverted circuit and the second static inverted circuit comprises a first transistor, a second transistor, and a third transistor;

in the first static inverted circuit, the first transistor and the second transistor works as an inverter circuit, and the third transistor is served as a reset transistor;

in the second static inverted circuit, the first transistor and the second transistor works as an inverter circuit, and the third transistor is served as a set transistor.

16. The touch display apparatus of claim 10, wherein the shift register circuit is a bidirectional shift register circuit, and is selectively operated in a forward direction and a reverse direction for sequentially applying the pulse signals to the gate lines;

each shift register unit receives two clock signal, a first scan start signal, and a second scan start signal;

one of the two clock signal is applied to the FF circuit as the reset signal, and the other of the two clock signal is applied to the output circuit.

17. The touch display apparatus of claim 10, wherein the control circuit further receives a second touch signal, the first touch signal is inverted with the second touch signal;

the second touch signal clamps the potential of the internal inverted terminal.