Logic circuit and semiconductor device

• US 10,490,671 B2
• Filed: 11/09/2015
• Issued: 11/26/2019
• Est. Priority Date: 10/16/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun, Tsubuku, Masashi, Noda, Kosei
• Primary Examiner(s): Taningco, Alexander H
• Assistant Examiner(s): Bahr, Kurtis R
• Application Number:
  US14/936,305
• Publication Number:
  US 20160064570A1
• Time in Patent Office: 1,478 Days
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×10¹⁹ (atoms/cm³) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

Claims

1. A semiconductor device comprising:

a transistor comprising a first terminal, a second terminal and a gate terminal;

a logic circuit comprising a first output terminal, the first output terminal being electrically connected to the first terminal; and

a capacitor,

wherein the gate terminal is electrically connected to a line,

wherein one terminal of the capacitor is electrically connected to the second terminal and a second output terminal,

wherein each of a source region, a drain region and a channel formation region of the transistor comprises an oxide semiconductor,

wherein the oxide semiconductor includes a plurality of crystals,

wherein the oxide semiconductor comprises indium, gallium and a metal other than indium and gallium,

wherein a hydrogen concentration of the channel formation region is 5×

10¹⁹ atoms/cm³ or less,

wherein the channel formation region is in an oxygen excess state, and

wherein a carrier density of the source region is higher than a carrier density of the channel formation region.

2. The semiconductor device according to claim 1,

wherein the logic circuit comprises a second transistor, and

wherein the channel formation region of the second transistor comprises an oxide semiconductor.

3. The semiconductor device according to claim 1, wherein the other terminal of the capacitor is electrically connected to a low power supply potential line.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor comprises an In—

Ga—

Zn—

O-based oxide semiconductor.

5. An electronic device comprising the semiconductor device according to claim 1.

6. The semiconductor device according to claim 1, wherein the metal is zinc.

7. A semiconductor device comprising:

a transistor comprising a first terminal, a second terminal and a gate terminal;

a register comprising a first output terminal, the first output terminal being electrically connected to the first terminal; and

a capacitor,

wherein the gate terminal is electrically connected to a line,

wherein one terminal of the capacitor is electrically connected to the second terminal and a second output terminal,

wherein each of a source region, a drain region and a channel formation region of the transistor comprises an oxide semiconductor,

wherein the oxide semiconductor includes a plurality of crystals,

wherein the oxide semiconductor comprises indium, gallium and a metal other than indium and gallium,

wherein a hydrogen concentration of the channel formation region is 5×

10¹⁹ atoms/cm³ or less,

wherein the channel formation region is in an oxygen excess state, and

wherein a carrier density of the source region is higher than a carrier density of the channel formation region.

8. The semiconductor device according to claim 7,

wherein the register comprises a second transistor, and

wherein the channel formation region of the second transistor comprises an oxide semiconductor.

9. The semiconductor device according to claim 7, wherein the other terminal of the capacitor is electrically connected to a low power supply potential line.

10. The semiconductor device according to claim 7, wherein the oxide semiconductor comprises an In—

Ga—

Zn—

O-based oxide semiconductor.

11. The semiconductor device according to claim 7, wherein the metal is zinc.

12. The semiconductor device according to claim 7, wherein a carrier density of an oxide semiconductor layer including the source region, the drain region and the channel formation region is 1.45×

10¹⁰/cm³ or less.

13. An electronic device comprising the semiconductor device according to claim 7.

14. A semiconductor device comprising:

a transistor comprising a first terminal, a second terminal and a gate terminal;

a logic circuit comprising a first output terminal, the first output terminal being electrically connected to the first terminal; and

a capacitor,

wherein the gate terminal is electrically connected to a line,

wherein one terminal of the capacitor is electrically connected to the second terminal and a second output terminal,

wherein each of a source region, a drain region and a channel formation region of the transistor comprises an oxide semiconductor,

wherein the oxide semiconductor includes a plurality of crystals,

wherein the oxide semiconductor comprises indium, gallium and a metal other than indium and gallium,

wherein a hydrogen concentration of the channel formation region is 5×

10¹⁹ atoms/cm³ or less,

wherein the channel formation region is in an oxygen excess state,

wherein a carrier density of the source region is higher than a carrier density of the channel formation region, and

wherein a carrier density of an oxide semiconductor layer including the source region, the drain region and the channel formation region is 1.45×

10¹⁰/cm³ or less.

15. The semiconductor device according to claim 14,

wherein the logic circuit comprises a second transistor, and

wherein the channel formation region of the second transistor comprises an oxide semiconductor.

16. The semiconductor device according to claim 14, wherein the other terminal of the capacitor is electrically connected to a low power supply potential line.

17. The semiconductor device according to claim 14, wherein the oxide semiconductor comprises an In—

Ga—

Zn—

O-based oxide semiconductor.

18. The semiconductor device according to claim 14, wherein an off-state current of the transistor is 1×

10<sup>−

13</sup> [A] or less when a voltage between source and drain of the transistor is 10V.

19. The semiconductor device according to claim 14, wherein the metal is zinc.

20. An electronic device comprising the semiconductor device according to claim 14.

21. A semiconductor device comprising:

a transistor comprising a first terminal, a second terminal and a gate terminal;

a logic circuit comprising a first output terminal, the first output terminal being electrically connected to the first terminal; and

a capacitor,

wherein the gate terminal is electrically connected to a line,

wherein one terminal of the capacitor is electrically connected to the second terminal and a second output terminal,

wherein each of a source region, a drain region and a channel formation region of the transistor comprises an oxide semiconductor,

wherein the oxide semiconductor includes a plurality of crystals,

wherein the oxide semiconductor comprises indium, gallium and a metal other than indium and gallium,

wherein a hydrogen concentration of the channel formation region is 5×

10¹⁹ atoms/cm³ or less.

22. The semiconductor device according to claim 21,

wherein the logic circuit comprises a second transistor, and

wherein the channel formation region of the second transistor comprises an oxide semiconductor.

23. The semiconductor device according to claim 21, wherein the other terminal of the capacitor is electrically connected to a low power supply potential line.

24. The semiconductor device according to claim 21, wherein the oxide semiconductor comprises an In—

Ga—

Zn—

O-based oxide semiconductor.

25. The semiconductor device according to claim 21, wherein the metal is zinc.

26. An electronic device comprising the semiconductor device according to claim 21.