Touch circuit, touch sensing device, and touch sensing method

• US 10,496,230 B2
• Filed: 12/16/2017
• Issued: 12/03/2019
• Est. Priority Date: 12/20/2016
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Lee, HongJu, Kang, HyeongWon, Jo, Youngwoo
• Primary Examiner(s): Jansen, II, Michael J
• Application Number:
  US15/844,533
• Publication Number:
  US 20180173342A1
• Time in Patent Office: 717 Days
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/0418 for error correction or compensation, e.g. based on parallax, calibration or alignment
• CPC Class Codes: G06F 3/044 by capacitive means

Abstract

The present disclosure relates to a touch circuit, a touch sensing device, and a touch sensing method. According to the present disclosure, it is possible to obtain an accurate touch sensing result (the presence or absence of a touch and/or a touch position) by compensating for the unintentional change in the quantity of the charge corresponding to a signal obtained by driving a touch screen panel, so as to obtain sensing data in which the influence of the parasitic capacitance generated inside or outside the touch screen panel is reduced or eliminated, thereby improving capacitance-based touch sensing performance.

Claims

1. A touch circuit comprising:

a preamplifier electrically connected to a touch screen panel supplied with a touch driving pulse, having an inverting input terminal, a non-inverting input terminal, and an output terminal; and

a charge control circuit comprising;

a first terminal connectable to the inverting input terminal of the preamplifier and a second terminal to which a charge control pulse is applied,

wherein, the first terminal of the charge control circuit is a shared terminal, which can be commonly connected to the inverting input terminal of two or more preamplifiers among the M or more preamplifiers when the touch circuit has M (M≥

2) or more preamplifiers,

a charge control capacitor, and

a control switch circuit configured to control current flow between a first terminal of the charge control capacitor and the inverting input terminal of the preamplifier,

wherein the control switch circuit comprises,

a first P-type transistor and a first N-type transistor, which are connected to the inverting input terminal of the preamplifier;

a second P-type transistor connecting the first P-type transistor and the first terminal of the charge control capacitor and a second N-type transistor connecting the first N-type transistor and the first terminal of the charge control capacitor,

wherein a gate node of the first P-type transistor and a gate node of the second P-type transistor are connected to each other, and a gate node of the first N-type transistor and a gate node of the second N-type transistor are connected to each other,

a first switch configured to perform control as to whether to connect a point where the first N-type transistor and the second N-type transistor are connected and a point where the gate node of the first N-type transistor and the gate node of the second N-type transistor are connected, and a second switch configured to perform control as to whether to connect a point where the first P-type transistor and the second P-type transistor are connected and a point where the gate node of the first P-type transistor and the gate node of the second P-type transistor are connected; and

a third switch configured to perform control as to whether to connect the second P-type transistor and the first terminal of the charge control capacitor, and a fourth switch configured to perform control as to whether to connect the second N-type transistor and the first terminal of the charge control capacitor.

2. The touch circuit of claim 1, wherein the number of charge control circuits is equal to or less than the number of preamplifiers.

3. The touch circuit of claim 1,

wherein the charge control circuit configured to control an electric charge input to the inverting input terminal of the preamplifier, through charging or discharging of the charge control capacitor.

4. The touch circuit of claim 1, wherein the touch driving pulse is toggled between a low level voltage and a high level voltage, the charge control pulse is toggled between the low level voltage and the high level voltage, and the charge control pulse undergoes level change once or never during one low level voltage period or one high level voltage period of the touch driving pulse.

5. The touch circuit of claim 1, wherein the touch driving pulse is toggled between a low level voltage and a high level voltage, the charge control pulse is toggled between the low level voltage and the high level voltage, and the charge control pulse undergoes level change two or more times during one low level voltage period or one high level voltage period of the touch driving pulse.

6. The touch circuit of claim 3, further comprising:

an integrator performing integration of an output signal output from the output terminal of the preamplifier; and

a sample and hold circuit storing an output signal of the integrator,

wherein the touch circuit includes Q (Q≥

2) sensing units when the preamplifier, the integrator, and the sample and hold circuit constitute one sensing unit.

7. The touch circuit of claim 6, wherein the Q sensing units is shared with the charge control capacitor and exists as a single charge control capacitor.

8. The touch circuit of claim 6, wherein the Q sensing units are grouped into K (1≤

K≤

Q) sensing unit groups, and the charge control capacitor is shared with the K sensing unit groups and exists as a single charge control capacitor for each of the K sensing unit groups.

9. The touch circuit of claim 1, wherein the first switch and the third switch are in an ON state, the second switch and the fourth switch are in an OFF state in at least some of high level voltage periods of the touch driving pulse, and

the first switch and the third switch are in an OFF state, and the second switch and the fourth switch are in an ON state in at least some of low level voltage periods of the touch driving pulse.

10. The touch circuit of claim 1, wherein the touch driving pulse is toggled between a low level voltage and a high level voltage, the charge control pulse is toggled between the low level voltage and the high level voltage, and the charge control pulse undergoes level change once or never during one low level voltage period or one high level voltage period of the touch driving pulse.

11. The touch circuit of claim 10, wherein, during a high level voltage period of the touch driving pulse, when the charge control pulse falls, the first P-type transistor flows a current, so that an electric charge is additionally injected at the inverting input terminal of the preamplifier, and during a low level voltage period of the touch driving pulse, when the charge control pulse rises, the first N-type transistor flows a current, so that a portion of the electric charge input to the inverting input terminal of the preamplifier is removed.

12. The touch circuit of claim 11, wherein a magnitude of the current passing through the first P-type transistor is determined based on one or more of control factors including an amplitude of the charge control pulse, a capacitance of the charge control capacitor, and a ratio between a size of the first P-type transistor and a size of the second P-type transistor, and

a magnitude of the current passing through the first N-type transistor is determined based on one or more of control factors including the amplitude of the charge control pulse, the capacitance of the charge control capacitor, and a ratio between a size of the first N-type transistor and a size of the second N-type transistor.

13. The touch circuit of claim 1, wherein the touch driving pulse is toggled between a low level voltage and a high level voltage, the charge control pulse is toggled between the low level voltage and the high level voltage, and the charge control pulse undergoes level change two or more times during one low level voltage period or one high level voltage period of the touch driving pulse.

14. The touch circuit of claim 13, wherein, during a high level voltage period of the touch driving pulse, when the charge control pulse rises, the first P-type transistor is turned off, and when the charge control pulse falls, the first P-type transistor flows a current, so that an electric charge is additionally injected at the inverting input terminal of the preamplifier, and

during a low level voltage period of the touch driving pulse, when the charge control pulse falls, the first N-type transistor is turned off, and when the charge control pulse rises, the first N-type transistor flows a current, so that a portion of the electric charge input to the inverting input terminal of the preamplifier is removed.

15. The touch circuit of claim 14, wherein a magnitude of the current passing through the first P-type transistor is determined based on one or more of control factors including an amplitude of the charge control pulse, a capacitance of the charge control capacitor, and a ratio between a size of the first P-type transistor and a size of the second P-type transistor, and

a magnitude of the current passing through the first N-type transistor is determined based on one or more of control factors including the amplitude of the charge control pulse, the capacitance of the charge control capacitor, and a ratio between a size of the first N-type transistor and a size of the second N-type transistor.

16. The touch circuit of claim 1, further comprising a feedback switch connected to both terminals of a feedback capacitor connecting the inverting input terminal and the output terminal of the preamplifier,

wherein an on-off timing of the first switch and an on-off timing of the third switch correspond to each other,

an on-off timing of the second switch and an on-off timing of the fourth switch correspond to each other,

the on-off timing of the first switch and the on-off timing of the third switch are opposite the on-off timing of the second switch and the on-off timing of the fourth switch, respectively, and

the feedback switch is turned on at the on-off timing of the first switch, the second switch, the third switch, and the fourth switch.

17. The touch circuit of claim 1, further comprising:

an integrator performing integration of an output signal output from an output terminal of the preamplifier; and

a sample and hold circuit storing an output signal of the integrator,

wherein the touch circuit includes Q (Q≥

2) sensing units when the preamplifier, the integrator, and the sample and hold circuit constitute one sensing unit,

the first P-type transistor and the first N-type transistor exist for each of the respective Q sensing units, and

each of the second P-type transistor, the second N-type transistor, the first switch, the second switch, the third switch, the fourth switch, and the charge control capacitor is common to the Q sensing units and exists as a single element.

18. The touch circuit of claim 1, further comprising:

an integrator performing integration of an output signal output from an output terminal of the preamplifier; and

a sample and hold circuit storing an output signal of the integrator, wherein the touch circuit comprises Q (Q≥

2) sensing units when the preamplifier, the integrator, and the sample and hold circuit constitute one sensing unit,

the Q sensing units are grouped into K (1≤

K≤

Q) sensing unit groups,

the first P-type transistor and the first N-type transistor exist for each of the respective Q sensing units, and

each of the second P-type transistor, the second N-type transistor, the first switch, the second switch, the third switch, the fourth switch, and the charge control capacitor is common to the K sensing units and exists as a single element.

19. The touch circuit of claim 1, wherein the charge control circuit further comprises:

an additional charge control capacitor having a first terminal, and a second terminal to which the charge control pulse is applied;

a fifth switch configured to perform control as to whether to connect the first terminal of the additional charge control capacitor and the inverting input terminal of the preamplifier; and

a sixth switch configured to perform control as to whether to connect the first terminal of the additional charge control capacitor and the non-inverting input terminal of the preamplifier.

20. The touch circuit of claim 3, wherein, in the charge control circuit, the charge control capacitor comprises:

a first charge control capacitor having a first terminal, and a second terminal to which the charge control pulse is applied; and

a second charge control capacitor having a first terminal, and a second terminal to which the charge control pulse is applied,

wherein the charge control circuit further comprises;

a first P-type transistor connected to an inverting input terminal of the preamplifier;

a first N-type transistor connected to an inverting input terminal of the preamplifier;

a second P-type transistor connecting the first P-type transistor and the first terminal of the first charge control capacitor; and

a second N-type transistor connecting the first N-type transistor and the first terminal of the second charge control capacitor,

a gate node of the first P-type transistor and a gate node of the second P-type transistor are connected to each other, and a gate node of the first N-type transistor and a gate node of the second N-type transistor are connected to each other.

21. The touch circuit of claim 20, wherein the charge control circuit further comprises:

a first switch performing control as to whether to connect the first N-type transistor and the inverting input terminal of the preamplifier; and

a second switch performing control as to whether to connect the first P-type transistor and the inverting input terminal of the preamplifier.

22. The touch circuit of claim 20, wherein the charge control circuit further comprises:

a third switch performing control as to whether to connect a point where the first N-type transistor and the second N-type transistor are connected to each other with a point where the gate node of the first N-type transistor and the gate node of the second N-type transistor are connected to each other; and

a fourth switch performing control as to whether to connect a point where the first P-type transistor and the second P-type transistor are connected to each other with a point where the gate node of the first P-type transistor and the gate node of the second P-type transistor are connected to each other.

23. A touch sensing device comprising:

a touch screen panel having a plurality of touch electrodes disposed thereon; and

a touch circuit supplying a touch driving pulse to the plurality of touch electrodes and receiving a signal,

wherein the touch circuit comprises;

a preamplifier having an inverting input terminal electrically connectable to a touch screen panel, a non-inverting input terminal configured to receive an input of a touch driving pulse to be supplied to the touch screen panel, and an output terminal for outputting a signal; and

a charge control circuit comprising,

a first terminal connectable to the inverting input terminal of the preamplifier,

a second terminal to which a charge control pulse is applied,

wherein the first terminal of the charge control circuit is a shared terminal, which can be commonly connected to the inverting input terminals of the two or more preamplifiers among the M or more preamplifiers when the touch circuit has M (M≥

2) or more preamplifiers, and

a control switch circuit configured to control current flow between the first terminal of the charge control circuit and the inverting input terminal of the M (M≥

2) or more preamplifiers,

wherein the control switch circuit comprises,

a first P-type transistor and a first N-type transistor, which are connected to the inverting input terminal of the preamplifier;

a second P-type transistor connecting the first P-type transistor and the first terminal of the charge control capacitor and a second N-type transistor connecting the first N-type transistor and the first terminal of the charge control capacitor,

wherein a gate node of the first P-type transistor and a gate node of the second P-type transistor are connected to each other, and a gate node of the first N-type transistor and a gate node of the second N-type transistor are connected to each other,

a first switch configured to perform control as to whether to connect a point where the first N-type transistor and the second N-type transistor are connected and a point where the gate node of the first N-type transistor and the gate node of the second N-type transistor are connected, and a second switch configured to perform control as to whether to connect a point where the first P-type transistor and the second P-type transistor are connected and a point where the gate node of the first P-type transistor and the gate node of the second P-type transistor are connected; and

a third switch configured to perform control as to whether to connect the second P-type transistor and the first terminal of the charge control capacitor, and a fourth switch configured to perform control as to whether to connect the second N-type transistor and the first terminal of the charge control capacitor.

24. A touch sensing method comprising:

supplying a touch driving pulse to a touch screen panel;

receiving a signal from the touch screen panel;

adjusting the received signal;

generating a sensing value through performing signal processing of the adjusted signal; and

acquiring touch information based on the sensing value,

wherein the touch screen panel includes a charge control circuit including a charge control capacitor, and

a control switch circuit configured to control current flow between a first terminal of the charge control capacitor and an inverting input terminal of a preamplifier,

wherein the control switch circuit comprises,

a first P-type transistor and a first N-type transistor, which are connected to the inverting input terminal of the preamplifier;

a second P-type transistor connecting the first P-type transistor and the first terminal of the charge control capacitor and a second N-type transistor connecting the first N-type transistor and the first terminal of the charge control capacitor,

wherein a gate node of the first P-type transistor and a gate node of the second P-type transistor are connected to each other, and a gate node of the first N-type transistor and a gate node of the second N-type transistor are connected to each other,

a first switch configured to perform control as to whether to connect a point where the first N-type transistor and the second N-type transistor are connected and a point where the gate node of the first N-type transistor and the gate node of the second N-type transistor are connected, and a second switch configured to perform control as to whether to connect a point where the first P-type transistor and the second P-type transistor are connected and a point where the gate node of the first P-type transistor and the gate node of the second P-type transistor are connected; and

a third switch configured to perform control as to whether to connect the second P-type transistor and the first terminal of the charge control capacitor, and a fourth switch configured to perform control as to whether to connect the second N-type transistor and the first terminal of the charge control capacitor.