Power-safe data management system

• US 10,496,535 B2
• Filed: 06/18/2018
• Issued: 12/03/2019
• Est. Priority Date: 03/28/2011
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Chiu, Lyndon S., Adi, Frederick H.
• Primary Examiner(s): Matin, Tasnima
• Application Number:
  US16/011,569
• Publication Number:
  US 20180300241A1
• Time in Patent Office: 533 Days
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Embodiments of the invention include systems and methods for recovering the system status and maintaining drive coherency after an unexpected power loss. In particular, these systems and methods reduce overhead for maintaining drive coherency by providing for pre-allocation of groups of write addresses and recording the pre-allocated groups of addresses to the non-volatile memory. Write processes can write to the pre-allocated group of addresses while the next group of addresses are pre-allocated and recorded to non-volatile memory.

Claims

1. A method comprising:

loading a master record stored in a non-volatile memory after a power loss event occurred for a data storage system comprising the non-volatile memory;

determining, based on the master record, a first superblock of addresses in the non-volatile memory;

determining whether a last written page is detected from the first superblock of addresses in the non-volatile memory; and

in response to determining that the last written page is detected from the first superblock of addresses in the non-volatile memory;

determining, based on the detected last written page, an address in the non-volatile memory; and

setting the address as a next write location for a write process associated with the first superblock of addresses in the non-volatile memory.

2. The method of claim 1, further comprising:

in response to determining that the last written page is not detected from the first superblock of addresses in the non-volatile memory;

determining, based on the master record, a second superblock of addresses in the non-volatile memory;

determining whether the last written page is detected from the second superblock of addresses in the non-volatile memory; and

in response to determining that the last written page is detected from the second superblock of addresses in the non-volatile memory;

determining, based on the detected last written page, an second address in the non-volatile memory; and

setting the second address as the next write location for a write process associated with the second superblock of addresses in the non-volatile memory.

3. The method of claim 2, wherein the second address is an address within the second superblock of addresses in the non-volatile memory.

4. The method of claim 1, wherein the address is an address within the first superblock of addresses in the non-volatile memory.

5. The method of claim 1, further comprising:

determining, based on log data in the master record, a last logged page of the non-volatile memory; and

determining, based on the last logged page, the first superblock of addresses in the non-volatile memory.

6. The method of claim 5, further comprising:

determining, based on the last logged page, the write process associated with the first superblock of addresses in the non-volatile memory; and

determining, based on the write process, the first superblock of addresses in the non-volatile memory.

7. The method of claim 1, further comprising:

scanning the first superblock of addresses in the non-volatile memory; and

detecting, based on the scanning the first superblock of addresses in the non-volatile memory, the last written page.

8. The method of claim 7, further comprising:

determining, based on the scanning the first superblock of addresses in the non-volatile memory, data operations performed at the first superblock of addresses in the non-volatile memory; and

updating log data in the master record with the determined data operations.

9. The method of claim 1, wherein the first superblock of addresses in the non-volatile memory is designated as a previous superblock in the master record.

10. The method of claim 1, wherein the first superblock of addresses in the non-volatile memory is designated as a current superblock in the master record.

11. A storage system comprising:

a non-volatile memory; and

a controller;

wherein the controller is configured to;

load a master record stored in a non-volatile memory after a power loss event occurred for a data storage system comprising the non-volatile memory;

determine, based on the master record, a first superblock of addresses in the non-volatile memory;

determine whether a last written page is detected from the first superblock of addresses in the non-volatile memory; and

when the last written page is detected from the first superblock of addresses in the non-volatile memory,

determine an address within the first superblock of addresses in the non-volatile memory, and

set the address as a next write location for a write process associated with the first superblock of addresses.

12. The storage system of claim 11, wherein the controller is configured to:

when the last written page is not detected from the first superblock of addresses in the non-volatile memory,

determine a second superblock of addresses in the non-volatile memory;

determine whether the last written page is detected from the second superblock of addresses in the non-volatile memory; and

when the last written page is detected from the second superblock of addresses in the non-volatile memory,

determine an second address in the non-volatile memory, and

set the second address as the next write location for a write process associated with the second superblock of addresses.

13. The storage system of claim 12, wherein the second address is an address within the second superblock of addresses in the non-volatile memory.

14. The storage system of claim 11, wherein the controller is configured to:

determine a last logged page of the non-volatile memory based on log data in the master record; and

determine the first superblock of addresses in the non-volatile memory based on the last logged page.

15. The storage system of claim 14, wherein the controller is configured to:

determine the write process associated with the first superblock of addresses in the non-volatile memory based on the last logged page; and

determine the first superblock of addresses in the non-volatile memory based on the write process.

16. The storage system of claim 11, wherein the controller is configured to:

detect, based on a scan of the first superblock of addresses in the non-volatile memory, the last written page.

17. The storage system of claim 16, wherein the controller is configured to:

determine data operations performed at the first superblock of addresses in the non-volatile memory based on the scan of the first superblock of addresses in the non-volatile memory; and

update log data in the master record with the data operations determined from the scan of the first superblock of addresses in the non-volatile memory.

18. A system comprising:

means for loading a master record stored in a non-volatile memory after a power loss event occurred for a data storage system comprising the non-volatile memory;

means for determining, based on the master record, a first superblock of addresses in the non-volatile memory;

means for determining whether a last written page is detected from the first superblock of addresses in the non-volatile memory; and

in response to determining that the last written page is detected from the first superblock of addresses in the non-volatile memory;

means for determining, based on the detected last written page, an address in the non-volatile memory; and

means for setting the address as a next write location for a write process associated with the first superblock of addresses in the non-volatile memory.

19. The system of claim 18, further comprising:

in response to determining that the last written page is not detected from the first superblock of addresses in the non-volatile memory;

means for determining, based on the master record, a second superblock of addresses in the non-volatile memory;

means for determining whether the last written page is detected from the second superblock of addresses in the non-volatile memory; and

in response to determining that the last written page is detected from the second superblock of addresses in the non-volatile memory;

means for determining, based on the detected last written page, an second address in the non-volatile memory; and

means for setting the second address as the next write location for a write process associated with the second superblock of addresses in the non-volatile memory.

20. A non-transitory machine-readable medium including machine-executable instructions thereon that, when executed by a processor, perform a method comprising:

loading a master record stored in a non-volatile memory after a power loss event occurred for a data storage system comprising the non-volatile memory;

determining, based on the master record, a first superblock of addresses in the non-volatile memory;

determining whether a last written page is detected from the first superblock of addresses in the non-volatile memory; and

in response to determining that the last written page is detected from the first superblock of addresses in the non-volatile memory;

determining, based on the detected last written page, an address in the non-volatile memory; and

setting the address as a next write location for a write process associated with the first superblock of addresses in the non-volatile memory;

in response to determining that the last written page is not detected from the first superblock of addresses in the non-volatile memory;

determining a second superblock of addresses in the non-volatile memory;

determining whether the last written page is detected from the second superblock of addresses in the non-volatile memory; and

in response to determining that the last written page is detected from the second superblock of addresses in the non-volatile memory;

determining, based on the detected last written page, an second address in the non-volatile memory; and

setting the second address as the next write location for a write process associated with the second superblock of addresses in the non-volatile memory.