Context-sensitive interrupts

• US 10,496,573 B2
• Filed: 03/31/2017
• Issued: 12/03/2019
• Est. Priority Date: 03/31/2017
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Schulz, Steffen, Koeberl, Patrick, Shanbhogue, Vedvyas, Brandt, Jason W., Madduri, Venkateswara R., Kim, Sang W., Carreno, Julien
• Primary Examiner(s): Shin, Christopher B
• Application Number:
  US15/476,001
• Publication Number:
  US 20180285291A1
• Time in Patent Office: 977 Days
• Field of Search: 710267
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence

Abstract

Methods, apparatus, and system to create interrupts which are resolved at runtime relative to an active compartment. Active compartments may be, for example, a compartment of an operating system (“OS”) or a trusted execution environment (“TEE”). The context-specific interrupts comprise an interrupt dispatch table (“IDT”) for each compartment.

Claims

1. An apparatus for computing, comprising:

a computer processor including a hardware exception unit; and

a memory coupled with the computer processor to host an interrupt dispatch table (“

IDT”

), a plurality of execution compartments having respective one or more processes, and a context-sensitive interrupt instantiation module, to be accessed or executed by the computer processor;

wherein the context-sensitive interrupt instantiation module is to instantiate an interrupt of a process in one of the execution compartments;

wherein to instantiate the interrupt, the context-sensitive interrupt instantiation module is to create an interrupt gate entry in the IDT, wherein the interrupt gate entry is resolved at runtime when the execution compartment of the process is active, independent of other execution compartments, to trigger the interrupt, and interrupt the process using the hardware exception unit.

2. The apparatus according to claim 1, wherein the context-sensitive interrupt instantiation module is to create the interrupt gate entry in the IDT to invoke a context-sensitive local descriptor table record (“

context-sensitive LDT record”

) within a local descriptor table (“

LDT”

) of the execution compartment of the process;

wherein the context-sensitive interrupt instantiation module is to program the context-sensitive LDT record with a memory segment descriptor, wherein the memory segment descriptor identifies an interrupt service routine (“

ISR”

) code and data of the interrupt.

3. The apparatus according to claim 2, wherein the interrupt is a first interrupt, and wherein the context-sensitive interrupt instantiation module is to instantiate a second interrupts, wherein the first and second interrupts comprise first and second memory segment descriptors, wherein the first and second memory segment descriptors point to a common memory location, wherein the common memory location comprises the ISR code and data of the first and second interrupts, and wherein an integrity of the common memory location is protected by a write access protection.

4. The apparatus according to claim 1, wherein the execution compartment of the process is one of an execution environment of an operating system (“

OS”

) or of a trusted execution environment (“

TEE”

), wherein the execution compartment uses a memory region of the memory protected by a root of trust, wherein the interrupt is to be invoked directly, without a mutually trusted dispatcher, and wherein the execution compartment of the execution environment of the OS or of the TEE is to store and retrieve its compartment state prior to and upon returning from the interrupt.

5. The apparatus according to claim 1, wherein the interrupt comprises a prefix to perform at least one of a clearing a shared resource, a timer, or a memory-mapped input/output register prior to an implementation of the interrupt, wherein the prefix is shared as immutable code across more than one execution compartment or is customized for each execution compartment, or each process within each execution compartment.

6. The apparatus according to claim 1, wherein the context-sensitive interrupt instantiation module is to instantiate the interrupt during initialization of the computer processor.

7. The apparatus according to claim 1, wherein the context-sensitive interrupt instantiation module is to create a context-sensitive local descriptor table (“

LDT”

) for each execution compartment, program the interrupt gate entry to point to the context-sensitive LDT of the execution compartment of the process, and wherein the context-sensitive interrupt instantiation module is to program a record of the LDT of the execution compartment of the process to perform a far call to an interrupt service routine (“

ISR”

) of an operating system or a TEE executed by the computer processor, wherein the far call comprises a task state segment (“

TSS”

) comprising an access and permissions of the ISR of the operating system or TEE and with a startup state to cause the computer processor to inspect the interrupt.

8. A computer implemented method, comprising:

instantiating an interrupt to interrupt a process within a first of a plurality of execution compartments hosted by a computer processor, by first creating a plurality of interrupt dispatch tables (“

IDTs”

), one for each of the plurality of execution compartments, and then creating an interrupt gate entry in an IDT of the plurality of the IDTs corresponding to the execution compartment of the process, wherein the interrupt gate entry is to be resolved at runtime when the execution compartment of the process is active, independent of other execution compartments, to trigger the interrupt and interrupt the process.

9. The method according to claim 8, wherein creating the interrupt gate entry in the IDT corresponding to the execution compartment of the process comprising creating the interrupt gate entry in the IDT corresponding to the execution compartment of the process to invoke a context-sensitive local descriptor table record (“

context-sensitive LDT record”

) in a local descriptor table (“

LDT”

) of the execution compartment of the process, and programming the context-sensitive LDT record in the LDT with a memory segment descriptor, wherein the memory segment descriptor identifies an interrupt service routine (“

ISR”

) code and data of the interrupt.

10. The method according to claim 9, wherein the interrupt is a first interrupt, and the method further comprises instantiating a second interrupts, wherein each of the first and second interrupts comprise memory segment descriptors, wherein the memory segment descriptors point to a common memory location, wherein the common memory location comprises the ISR code and data of the first and second interrupts, and wherein an integrity of the common memory location is protected by a write access protection.

11. The method according to claim 8, wherein the execution compartment of the process is one of an execution environment of an operating system (“

OS”

) or of a trusted execution environment (“

TEE”

), and the method further comprises protecting a memory region used by the execution compartment with a root of trust;

wherein the interrupt is to be invoked directly, without a mutually trusted dispatcher, and wherein the execution compartment of the execution environment of the OS or of the TEE is to store and retrieve its compartment state prior to and upon returning from the interrupt.

12. The method according to claim 8, further comprising creating a context-sensitive LDT for each execution compartment and programming the interrupt gate to point to the context-sensitive LDT of the execution compartment of the process, and programming a record of the LDT to perform a far call to an interrupt service routine (“

ISR”

), wherein the far call comprises a task state segment (“

TSS”

) including an access and permissions of the ISR and with a startup state to cause the computer processor to inspect the interrupt in conjunction with the far call.

13. A system comprising;

a computer processor including a hardware exception unit, wherein the system is to;

instantiate an interrupt to interrupt a process being executed in an execution compartment hosted by the computer processor, wherein to instantiate the interrupt, the system is to create an interrupt gate entry in an interrupt dispatch table (“

IDT”

) associated with the execution compartment of the process, wherein the interrupt gate entry is to be resolved at runtime by the system when the execution compartment is active, independent of other execution compartments, to trigger the interrupt and interrupt the process, using the hardware exception unit.

14. The system according to claim 13, wherein the system is further to create the interrupt gate entry in the IDT associated with the execution compartment of the process to invoke a context-sensitive local descriptor table record (“

context-sensitive LDT record”

) in a local descriptor table (“

LDT”

) associated with the execution compartment of the process, wherein the system is to program the context-sensitive LDT record with a memory segment descriptor, wherein the memory segment descriptor identifies an interrupt service routine (“

ISR”

) code and data of the interrupt.

15. The system according to claim 13, wherein the system further comprises memory coupled with the computer processor, and wherein the execution compartment of the process is one of an execution environment of an operating system (“

OS”

) or of a trusted execution environment (“

TEE”

), wherein the execution compartment uses a memory region of the memory protected by a root of trust, and wherein the interrupt is to be invoked directly, without a mutually trusted dispatcher, wherein the execution compartment of the execution environment of the OS or of the TEE is to store and retrieve its compartment state prior to and upon returning from the interrupt.

16. The system according to claim 13, wherein the interrupt comprises a prefix to perform at least one of a clearing a shared resource, a timer, or a memory-mapped input/output register prior to an implementation of the interrupt, wherein the prefix is shared as immutable code across more than one execution compartment or is customized for each process within each execution compartment.

17. The system according to claim 13, wherein the interrupt is a first interrupt, and wherein the system is to instantiate a second interrupts, wherein the first and second interrupts comprise memory segment descriptors, wherein the memory segment descriptors point to a common memory location, wherein the common memory location comprises ISR code and data of the first and second interrupts.

18. The system according to claim 13, wherein the system is to instantiate the interrupt during initialization of the computer processor.

19. The system according to claim 13, wherein the system is to create a context-sensitive local descriptor table (“

LDT”

) for each execution compartment, and program the interrupt gate entry to point to the context-sensitive LDT for the execution compartment of the process, and wherein the system is to program a record of the context-sensitive LDT to perform a far call to an interrupt service routine (“

ISR”

), wherein the far call comprises a task state segment (“

TSS”

) including an access and permissions of the ISR with a startup state to cause the computer processor to inspect the interrupt in a shared memory in conjunction with the far call.

20. One or more non-transitory computer-readable media comprising instructions that cause a computer device, in response to execution of the instructions by a computer processor of the computer device, to:

create a plurality of interrupt dispatch tables (“

IDTs”

), one for each execution compartment hosted by the computer processor, each execution compartment having one or more processes executed by the computer processor; and

create an interrupt gate entry in an IDT of the plurality of the IDTs corresponding to an execution compartment with a process to be interrupted, wherein the interrupt gate entry is to be resolved at runtime by the computer processor when the execution compartment of the process is active, independent of other execution compartments, to trigger the interrupt and interrupt the process using a hardware exception unit of the computer processor.

21. The computer-readable media according to claim 20, wherein the instructions are further to cause the computer processor to create the interrupt gate entry in the IDT to invoke a context-sensitive local descriptor table record (“

context-sensitive LDT record”

) of a local description table (“

LDT”

) associated with the execution compartment of the process to be interrupted, wherein the instructions are further to cause the computer processor to program the context-sensitive LDT record with a memory segment descriptor, wherein the memory segment descriptor identifies an interrupt service routine (“

ISR”

) code and data of the interrupt.

22. The computer-readable media according to claim 21, wherein the interrupt is a first interrupt, and wherein the instructions are further to cause the computer processor to instantiate a second interrupts, wherein the first and second interrupts comprise memory segment descriptors, wherein the memory segment descriptors point to a common memory location, wherein the common memory location comprises the ISR code and data of the first and second interrupt, and wherein an integrity of the common memory location is protected by a write access protection.

23. The computer-readable media according to claim 21, wherein the execution compartment of the process is one of an execution environment of an operating system (“

OS”

) or of a trusted execution environment (“

TEE”

), and wherein the interrupt is to be invoked directly, without a mutually trusted dispatcher.

24. The computer-readable media according to claim 21, wherein the interrupt comprises a prefix and wherein the instructions are further to cause the computer processor to use the prefix at runtime to perform at least one of a clearing of a shared resource, a timer, or a memory-mapped input/output register prior to an implementation of the interrupt, and wherein the instructions are to further cause the computer processor to share the prefix as immutable code across more than one execution compartment or as customized for each execution compartment, or each process within each execution compartment.

25. The computer-readable media according to claim 21, wherein the instructions are further to cause the computer processor to create a context-sensitive local descriptor table (“

LDT”

) for each execution compartment, to program the interrupt gate entry to point to the context-sensitive LDT of the execution compartment of the process, and to program a record of the LDT to perform a far call to an interrupt service routine (“

ISR”

) of the execution environment of the operating system or the TEE, wherein the far call comprises a task state segment (“

TSS”

).