Methods, circuits and systems for a package structure having wireless lateral connections

• US 10,497,655 B2
• Filed: 02/06/2018
• Issued: 12/03/2019
• Est. Priority Date: 06/15/2012
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Ziglioli, Federico Giovanni, Pagani, Alberto
• Primary Examiner(s): Tran, Minh Loan
• Application Number:
  US15/889,852
• Publication Number:
  US 20180166403A1
• Time in Patent Office: 665 Days
• Field of Search: None
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/49537 Plurality of lead frames mounted in one device
• CPC Class Codes: H01L 23/49551 characterised by bent parts
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/5385 : Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 23/642 : Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 28/40 : Capacitors
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A packaged semiconductor device includes an insulating material forming a side surface of the packaged semiconductor device. An integrated-circuit chip is embedded in the insulating material and includes a communication circuit. A wiring system is embedded in the insulating material and electrically couples the integrated-circuit chip with a plurality of package contact elements. A first communication pad is formed in the side surface and is operatively coupled to the communication circuit to enable signal exchange through the first communication pad.

Claims

1. A packaged semiconductor device, comprising

an insulating material forming a side surface of the packaged semiconductor device;

an integrated-circuit chip embedded in the insulating material and including a communication circuit;

a wiring system embedded in the insulating material and electrically coupling the integrated-circuit chip with a plurality of package contact elements; and

a first communication pad formed in the side surface and being operatively coupled to the communication circuit so as to enable wireless signal exchange via the first communication pad.

2. The packaged semiconductor device of claim 1, further comprising a second communication pad formed in the side surface and operatively coupled to the communication circuit to be operable independently of the first communication pad.

3. The packaged semiconductor device of claim 2, wherein the first communication pad and the second communication pad are arranged at different height levels.

4. The packaged semiconductor device of claim 1, wherein the first communication pad is a portion of a first lead frame.

5. The packaged semiconductor device of claim 4, wherein the second communication pad is a portion of a second lead frame positioned above the first lead frame.

6. The packaged semiconductor device of claim 1, wherein the wiring system includes a metal trace extending to the side surface and forming with an end portion thereof the first communication pad.

7. The packaged semiconductor device of claim 1, wherein the communication circuit and the first communication pad are operatively coupled by a wire bond connection or by a solder material.

8. An electronic system, comprising:

first and second packaged semiconductor devices, each of the first and second packaged semiconductor devices attached and electrically coupled via a plurality of package contact elements to a carrier substrate, and wherein each of the first and second packaged semiconductor device includes,

an insulating material forming a side surface of the packaged semiconductor device;

an integrated-circuit chip embedded in the insulating material and including a communication circuit;

a wiring system embedded in the insulating material and electrically coupling the integrated-circuit chip with a plurality of package contact elements; and

a first communication pad formed in the side surface and being operatively coupled to the communication circuit to enable signal exchange via the first communication pad; and

wherein the first communication pad of the first packaged semiconductor device and the first communication pad of the second packaged semiconductor device are aligned with each other to enable signal exchange between the first and second packaged semiconductor devices.

9. The electronic system of claim 8, where in the first communication pads are configured to provide wireless signal exchange between the first and second packaged semiconductor devices.

10. The electronic system of claim 9, further comprising a dielectric material formed between the first communication pads of the first and second packaged semiconductor devices.

11. The electronic system of claim 8, wherein the first communication pad of each of the first and second packaged semiconductor devices is positioned at a first height level above the carrier substrate, and wherein each of the first and second packaged semiconductor devices further includes a second communication pad formed in the side surface and operatively coupled to the communication circuit to enable signal exchange via the second communication pad, each second communication pad being positioned at second height level above the substrate carrier and the second height level being greater than the first height level.

12. The electronic system of claim 11, wherein each of the first communication pads comprises a portion of a first lead frame.

13. The electronic system of claim 12, wherein each of the second communication pads comprises a portion of a second lead frame positioned above the first lead frame.

14. The electronic system of claim 8, wherein the wiring system includes a metal trace extending to the side surface with an end portion of the metal trace forming the first communication pad.

15. The electronic system of claim 8, wherein the communication circuit and the first communication pad is operatively coupled to the communication circuit through a wire bond connection or a solder material.

16. A packaged semiconductor device, comprising

an insulating material forming a side surface of the packaged semiconductor device;

an integrated-circuit chip embedded in the insulating material and including a communication circuit, the integrated-circuit chip being attached to a substrate;

a wiring system embedded in the insulating material and electrically coupling the integrated-circuit chip with a plurality of package contact elements;

a first communication pad formed in the side surface, the first communication pad coupled to the communication circuit and being formed at a first height over the substrate; and

a second communication pad formed in the side surface and coupled to the communication circuit, the second communication pad being formed at a second height over the substrate that is greater than the first height.

17. The packaged semiconductor device of claim 16, wherein each of the first and second communication pads is configured to provide wireless signal exchange with the communication circuit.

18. The packaged semiconductor device of claim 16, wherein the substrate includes a carrier substrate and a base plate positioned on the carrier substrate.

19. The packaged semiconductor device of claim 16, wherein each of the first and second communication pads comprises a portion of a respective lead frame.

20. The packaged semiconductor device of claim 16, wherein the communication circuit is coupled to each of the first and second communication pads through one of a wire bond and a solder material.