Diversity receiver

• US 10,499,003 B2
• Filed: 08/24/2017
• Issued: 12/03/2019
• Est. Priority Date: 05/11/2016
• Status: Active Grant

• Current Assignee: Performance Drone Works LLC
• Original Assignee: Drone Racing League, Inc.
• Inventors: Tholen, Lucas J., Mitchell, David A., Anderson, Gregory Keith
• Primary Examiner(s): Yenke, Brian P
• Application Number:
  US15/686,126
• Publication Number:
  US 20170353688A1
• Time in Patent Office: 831 Days
• Field of Search: 348726, 348728, 348729, 348731, 348735, 348725, 348724, 348720, 348719, 348718, 348682, 348500, 348507, 348508, 348513, 348516, 348521, 348525, 3484251, 3484254, 3484331, 348470, 348484, 348383, 348194, 348711, 348707, 348706, 348705, 348638, 348659, 348563, 348571, 348572, 348580, 3484231, 348464, 348144, 455 631, 455 77, 455275, 4552771, 455418, 455562, 37524002, 375293
• CPC Class Codes: B64C 39/024 of the remote controlled vehicle type, i.e. RPV
• CPC Class Codes: B64C 39/028 Micro-sized aircraft
• CPC Class Codes: G08G 5/0069 specially adapted for an unmanned aircraft
• CPC Class Codes: H04B 1/0007 wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
• CPC Class Codes: H04B 7/08 at the receiving station
• CPC Class Codes: H04B 7/0848 Joint weighting
• CPC Class Codes: H04B 7/0857 using maximum ratio combining techniques, e.g. signal-to- interference ratio [SIR], received signal strenght indication [RSS]
• CPC Class Codes: H04L 27/14 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04N 21/4305 Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 5/04 Synchronising for television systems using pulse code modulation H04N7/56
• CPC Class Codes: H04N 5/067 Arrangements or circuits at the transmitter end
• CPC Class Codes: H04N 5/265 Mixing
• CPC Class Codes: H04N 5/455 Demodulation-circuits

Abstract

A diversity receiver synchronizes and mixes multiple input signals. In one embodiment, the receiver demodulates the multiple input signals prior to synchronizing, converts the demodulated multiple input signals from analog signals to digital signals, synchronizes the demodulated digital signals, converts the synchronized demodulated digital signals to analog signals and mixes the synchronized demodulated analog signals based on a characteristic of the input signals existing prior to the demodulating.

Claims

1. A receiver, comprising:

one or more synchronization circuits configured to synchronize multiple video signals to each other, the multiple video signals are received at the receiver, the multiple video signals are multiple copies of a common source signal received from a same transmitter via different signal paths and different antennas, the one or more synchronization circuits are configured to convert the multiple video signals from multiple analog video signals to multiple digital video signals and synchronize the multiple digital video signals, the one or more synchronization circuits are configured to convert the synchronized multiple digital video signals to synchronized multiple analog video signals;

a mixing circuit configured to mix the synchronized multiple analog video signals to create a combined video signal; and

multiple receiving circuits that are configured to receive the multiple video signals from the different signal paths and provide an indication of signal strength of the multiple video signals, the one or more synchronization circuits configured to synchronize the multiple digital video signals to a common reference signal, the mixing circuit configured to mix the synchronized multiple analog video signals based on the indication of signal strength for each of the multiple signals paths, the multiple receiving circuits are configured to receive FM modulated signals from the multiple signal paths and demodulate the FM modulated signals.

2. A receiver, comprising:

an input interface configured to receive multiple signals, the multiple signals are multiple copies of a common source signal received from a same transmission source; and

a processing circuit, connected to the input interface, configured to synchronize the multiple signals to a common reference signal and mix the synchronized multiple signals based on a determined characteristic of the multiple signals;

the processing circuit is configured to demodulate the multiple signals prior to synchronizing the multiple signals;

the processing circuit is configured to convert the demodulated multiple signals from analog demodulated multiple signals to digital demodulated multiple signals;

the processing circuit is configured to synchronize the digital demodulated multiple signals;

the processing circuit is configured to convert the synchronized digital demodulated multiple signals to synchronized analog demodulated multiple signals; and

the processing circuit is configured mix the synchronized analog demodulated multiple signals based on the determined characteristic of the multiple signals.

3. The receiver of claim 2, wherein:

the determined characteristic is signal strength.