Display apparatus and driving method thereof

• US 10,504,412 B2
• Filed: 10/04/2017
• Issued: 12/10/2019
• Est. Priority Date: 10/25/2016
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Han, Sangsu, Kim, Myeongsu, Bang, Silyi, Ahn, Kuk-hwan, Oh, Kwan-young, Choi, Jaeho
• Primary Examiner(s): Eurice, Michael J
• Application Number:
  US15/725,077
• Publication Number:
  US 20180114479A1
• Time in Patent Office: 797 Days
• CPC Class Codes: G09G 2310/0278 Details of driving circuits arranged to drive both scan and data electrodes
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2330/028 Generation of voltages supplied to electrode drivers in a matrix display other than LCD
• CPC Class Codes: G09G 2360/12 Frame memory handling
• CPC Class Codes: G09G 2370/045 using multiple communication channels, e.g. parallel and serial
• CPC Class Codes: G09G 2370/08 Details of image data interface between the display device controller and the data line driver circuit
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A display device includes: a display panel configured to display an image; a timing controller configured to output line configuration signals, frame configuration signals, and image signals; a plurality of data drivers each of which is configured to receive the line configuration signals, the frame configuration signals, and the image signals and provide a data voltage corresponding to the image signals to the display panel according to the line configuration signals and the frame configuration signals; a high speed driving line configured to connect the timing controller and one of the data drivers and transfer the image signals; and a low speed driving line configured to connect the timing controller and the data drivers and transfer the line configuration signals.

Claims

1. A display device comprising:

a display panel configured to display an image;

a timing controller configured to output line configuration signals, frame configuration signals, and image signals;

a plurality of data drivers each of which is configured to receive the line configuration signals, the frame configuration signals, and the image signals and provide a data voltage corresponding to the image signals to the display panel according to the line configuration signals and the frame configuration signals;

a high speed driving line configured to connect the timing controller and one of the data drivers and transfer the image signals from the timing controller to the one of the data drivers; and

a low speed driving line configured to connect the timing controller and the data drivers and transfer the line configuration signals from the timing controller to the data drivers,

wherein an (n+1)-th line configuration signal among the line configuration signals is output during a period overlapping with a period in which n-th line data among the line data is output, where n is a natural number.

2. The display device of claim 1,

wherein the timing controller is configured to output the image signals in a unit of line data.

3. The display device of claim 1, wherein the data driver is configured to transfer a link state signal to the timing controller via the low speed driving line between periods in which two of the line configuration signals are applied.

4. The display device of claim 1,

wherein the timing controller is configured to output the image signals in a unit of line data,

wherein the line data is transferred in a unit of a line segment,

wherein the line configuration signals are transferred in a unit of a line configuration segment,

wherein one line configuration segment is transferred in synchronization with a plurality of the line segments.

5. The display device of claim 1, wherein the timing controller is configured to transfer an image signal corresponding to one frame among the image signals during a vertical synchronization period, and then transfer the frame configuration signals via the high speed driving line during a vertical blank period.

6. The display device of claim 1, wherein the timing controller is configured to transfer the frame configuration signals via the low speed driving line.

7. The display device of claim 1,

wherein the frame configuration signals comprise a first frame configuration signal and a second frame configuration signal,

wherein the first frame configuration signal comprises a part of configuration information of the data driver required when outputting the image signal corresponding to one frame as a data voltage, and the second frame configuration signal comprises a remaining part of the configuration information,

wherein the timing controller transfers the first frame configuration signal via the high speed driving line, and transfers the second frame configuration signal via the low speed driving line.

8. The display device of claim 1,

wherein the high speed driving line and the low speed driving line have different interfaces,

wherein the high speed driving line has a higher transfer efficiency than that of the low speed driving line.

9. A display device comprising:

a display panel configured to display an image;

a timing controller configured to generate coding line configuration signals having a high level or a low level by coding received line configuration signals, and output the coding line configuration signals, frame configuration signals, and image signals;

data drivers each of which is configured to receive the coding line configuration signals, the frame configuration signals, and the image signals and provide a data voltage corresponding to the image signals to the display panel according to the coding line configuration signals and the frame configuration signals;

a high speed driving line configured to connect the timing controller and one of the data drivers and transfer the image signals from the timing controller to the one of the data drivers; and

a low speed driving line configured to connect the timing controller and the data drivers and transfer the coding line configuration signals from the timing controller to the data drivers,

wherein an (n+1)-th line configuration signal among the line configuration signals is output during a period overlapping with a period in which n-th line data among the line data is output, where n is a natural number.

10. The display device of claim 9, wherein the timing controller is configured to sense information about a link state with the data driver according to the line configuration signals.

11. A method for driving a display device, the method comprising:

transferring, by a timing controller, image signals to a data driver via a high speed driving line;

transferring, by the timing controller, line configuration signals to the data driver via a low speed driving line;

providing, by the data driver, a data voltage corresponding to the image signals to a display panel according to the line configuration signals;

outputting an (n+1)-th line configuration signal among the line configuration signals during a period overlapping with a period in which n-th line data among the line data is output, where n is a natural number; and

displaying, by the display panel, an image corresponding to the data voltage.

12. The method of claim 11, further comprising:

providing, by the data driver, a link state signal to the timing controller via the low speed driving line.

13. The method of claim 11, further comprising:

transferring, by the timing controller, frame configuration signals via the high speed driving line; and

providing, by the data driver, the data voltage corresponding to the image signals to the display panel according to the frame configuration signals additionally.

14. The method of claim 11, further comprising:

transferring, by the timing controller, frame configuration signals via the low speed driving line; and

providing, by the data driver, the data voltage corresponding to the image signals to the display panel according to the frame configuration signals additionally.

15. The method of claim 11, further comprising:

transferring, by the timing controller, a part of frame configuration signals via the high speed driving line;

transferring, by the timing controller, a remaining part of the frame configuration signals via the low speed driving line; and

providing, by the data driver, the data voltage corresponding to the image signals to the display panel according to the frame configuration signals additionally.

16. The method of claim 11,

wherein transferring the image signals to the data driver via the high speed driving line comprises transferring the image signals in a unit of line data.

17. The method of claim 16,

wherein the line data is transferred in a unit of a line segment,

wherein the line configuration signals are transferred in a unit of a line configuration segment,

wherein one line configuration segment is transferred in synchronization with a plurality of the line segments.

18. A method for driving a display device, the method comprising:

transferring, by a timing controller, image signals and a part of line configuration signals to a data driver via a high speed driving line;

transferring, by the timing controller, a remaining part of the line configuration signals to the data driver via a low speed driving line;

providing, by the data driver, a data voltage corresponding to the image signals to a display panel according to the line configuration signals;

outputting an (n+1)-th line configuration signal among the line configuration signals during a period overlapping with a period in which n-th line data among the line data is output, where n is a natural number; and

displaying, by the display panel, an image corresponding to the data voltage.

19. The method of claim 18, further comprising:

providing, by the data driver, a link state signal to the timing controller via the low speed driving line.

20. The method of claim 18, further comprising:

transferring, by the timing controller, frame configuration signals via the high speed driving line or the low speed driving line; and

providing, by the data driver, the data voltage corresponding to the image signals to the display panel according to the frame configuration signals additionally.