Semiconductor device including a shoulder portion and manufacturing method
First Claim
1. A semiconductor device comprising:
- a semiconductor substrate;
a gate trench that is formed in a front surface of the semiconductor substrate and is provided extending in a predetermined extension direction in the front surface of the semiconductor substrate;
a gate conducting portion that is formed within the gate trench, provided such that a top end thereof is at a deeper position than the front surface of the semiconductor substrate, and insulated from the semiconductor substrate;
a plurality of first regions and a plurality of second regions, provided in an alternating manner in the extension direction in a region adjacent to the gate trench in the front surface of the semiconductor substrate, each of the first regions having a higher impurity concentration than the semiconductor substrate, each of the second regions having a different conduction type than the first region, anda third region that is formed on the back surface side of each of the first regions and the second regions and has a different conduction type than the first regions, whereina plurality of shoulder portions are provided respectively in both a side wall of the gate trench adjacent to the first region and a side wall of the gate trench adjacent to the second region, and each of the shoulder portions is provided on the corresponding side wall of the gate trench between the top end of the gate conducting portion and the front surface of the semiconductor substrate and has an average slope, relative to a depth direction of the semiconductor substrate, that is greater than a slope of the corresponding side wall of the gate trench at a position opposite the top end of the gate conducting portion,each of the first regions and the second regions includes a side surface in direct contact with the gate trench, and a bottom surface that intersects with the side surface, the intersection of the side surface and the bottom surface provided at a position deeper than other portions of the bottom surface,an intersection of the bottom surface of the second region and the side surface adjacent to the gate trench is deeper than the intersection of the bottom surface of the first region and the side surface adjacent to the gate trench,a bottom surface of the second region at a center between the gate trench and an adjacent gate trench is deeper than the bottom surface of the first region at a center between the gate trench and an adjacent gate trench, anda length difference D7 between a depth at the intersection of the bottom surface of the second region and a depth at the intersection of the bottom surface of the first region is greater than a length difference D4 between a depth at the bottom surface of the second region at the center between the gate trench and the adjacent gate and a depth at the bottom surface of the first region at the center between the gate trench and the adjacent gate.
1 Assignment
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Accused Products
Abstract
A semiconductor device including a semiconductor substrate; a trench formed in a front surface of the semiconductor substrate; a gate conducting portion formed within the gate trench; and a first region formed adjacent to the trench in the front surface of the semiconductor substrate and having a higher impurity concentration than the semiconductor substrate. A shoulder portion is provided on a side wall of the gate trench between the top end of the gate conducting portion and the front surface of the semiconductor substrate and has an average slope, relative to a depth direction of the semiconductor substrate, that is greater than a slope of the side wall of the gate trench at a position opposite the top end of the gate conducting portion, and a portion of the first region that contacts the gate trench is formed as a deepest portion thereof.
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Citations
21 Claims
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1. A semiconductor device comprising:
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a semiconductor substrate; a gate trench that is formed in a front surface of the semiconductor substrate and is provided extending in a predetermined extension direction in the front surface of the semiconductor substrate; a gate conducting portion that is formed within the gate trench, provided such that a top end thereof is at a deeper position than the front surface of the semiconductor substrate, and insulated from the semiconductor substrate; a plurality of first regions and a plurality of second regions, provided in an alternating manner in the extension direction in a region adjacent to the gate trench in the front surface of the semiconductor substrate, each of the first regions having a higher impurity concentration than the semiconductor substrate, each of the second regions having a different conduction type than the first region, and a third region that is formed on the back surface side of each of the first regions and the second regions and has a different conduction type than the first regions, wherein a plurality of shoulder portions are provided respectively in both a side wall of the gate trench adjacent to the first region and a side wall of the gate trench adjacent to the second region, and each of the shoulder portions is provided on the corresponding side wall of the gate trench between the top end of the gate conducting portion and the front surface of the semiconductor substrate and has an average slope, relative to a depth direction of the semiconductor substrate, that is greater than a slope of the corresponding side wall of the gate trench at a position opposite the top end of the gate conducting portion, each of the first regions and the second regions includes a side surface in direct contact with the gate trench, and a bottom surface that intersects with the side surface, the intersection of the side surface and the bottom surface provided at a position deeper than other portions of the bottom surface, an intersection of the bottom surface of the second region and the side surface adjacent to the gate trench is deeper than the intersection of the bottom surface of the first region and the side surface adjacent to the gate trench, a bottom surface of the second region at a center between the gate trench and an adjacent gate trench is deeper than the bottom surface of the first region at a center between the gate trench and an adjacent gate trench, and a length difference D7 between a depth at the intersection of the bottom surface of the second region and a depth at the intersection of the bottom surface of the first region is greater than a length difference D4 between a depth at the bottom surface of the second region at the center between the gate trench and the adjacent gate and a depth at the bottom surface of the first region at the center between the gate trench and the adjacent gate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A semiconductor device comprising:
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a semiconductor substrate; a first gate trench that is formed in a front surface of the semiconductor substrate; a gate conducting portion that is formed within the first gate trench, provided such that a top end thereof is at a deeper position than the front surface of the semiconductor substrate, and insulated from the semiconductor substrate; and a first region that is formed adjacent to the first gate trench in the front surface of the semiconductor substrate and has a higher impurity concentration than the semiconductor substrate, wherein a shoulder portion is provided on a side wall of the first gate trench between the top end of the gate conducting portion and the front surface of the semiconductor substrate and has an average slope, relative to a depth direction of the semiconductor substrate, that is greater than a slope of the side wall of the first gate trench at a position opposite the top end of the gate conducting portion, and the first region includes a side surface in direct contact with the first gate trench, and a bottom surface that intersects with the side surface, the intersection of the side surface and the bottom surface provided at a position deeper than other portions of the bottom surface, wherein a second gate trench having a larger distance from the front surface of the semiconductor substrate to a top end of a corresponding gate conducting portion than that of the first gate trench is formed in the semiconductor substrate, an intersection of the bottom surface of the first region and a side surface adjacent to the second gate trench is deeper than the intersection of the bottom surface of the first region and the side surface adjacent to the first gate trench. - View Dependent Claims (18, 19, 20, 21)
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Specification