Process and temperature insensitive linear circuit
First Claim
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1. A circuit comprising:
- a front end section including a shunt-feedback inverter having a feedback structure comprising metal-oxide-semiconductor devices, the front end section configured to receive input current signals;
a programmable gain amplifier section coupled to the front end section, the programmable gain amplifier section including a plurality of inverters connected in series without a resistor disposed therebetween; and
an output buffer section coupled to the programmable gain amplifier section and configured to output voltage signals.
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Abstract
A circuit includes a front end section configured to receive input current signals; a programmable gain amplifier section coupled to the front end section, the programmable gain amplifier section including a plurality of inverters connected in series without a resistor disposed therebetween; and an output buffer section coupled to the programmable gain amplifier section and configured to output voltage signals.
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Citations
20 Claims
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1. A circuit comprising:
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a front end section including a shunt-feedback inverter having a feedback structure comprising metal-oxide-semiconductor devices, the front end section configured to receive input current signals; a programmable gain amplifier section coupled to the front end section, the programmable gain amplifier section including a plurality of inverters connected in series without a resistor disposed therebetween; and an output buffer section coupled to the programmable gain amplifier section and configured to output voltage signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A device comprising:
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a transimpedance amplifier; and a programmable linear regulator configured to provide an adjustable voltage to the transimpedance amplifier; wherein the transimpedance amplifier includes; a front end section configured to receive input current signals; a programmable gain amplifier section coupled to the front end section, the programmable gain amplifier section including a plurality of inverters connected in series without a resistor disposed therebetween; and an output buffer section coupled to the programmable gain amplifier section and configured to output voltage signals. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification