Method for manufacturing semiconductor devices
First Claim
1. A method of manufacturing a negative capacitance structure, the method comprising:
- forming a dielectric layer over a substrate;
forming a first metallic layer over the dielectric layer;
forming a cap layer over the first metallic layer;
after the cap layer is formed, performing an annealing operation; and
after the annealing operation, removing the cap layer and the first metallic layer;
wherein the annealing operation includes irradiating the cap layer, the first metallic layer and the dielectric layer with an energy beam, andafter the annealing operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.
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Abstract
In a method of manufacturing a circuit including a MOSFET disposed in a MOSFET region and a negative capacitance FET (NCFET) disposed in a NCFET region, a dielectric layer is formed over a channel layer in the MOSFET region and the NCFET region. A first metallic layer is formed over the dielectric layer in the MOSFET region and the NCFET region. After the first metallic layer is formed, an annealing operation is performed only in the NCFET region. After the annealing operation, the first metallic layer is removed from the MOSFET region and the NCFET region. The annealing operation includes irradiating the first metallic layer and the dielectric layer in the NCFET region with an energy beam.
5 Citations
20 Claims
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1. A method of manufacturing a negative capacitance structure, the method comprising:
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forming a dielectric layer over a substrate; forming a first metallic layer over the dielectric layer; forming a cap layer over the first metallic layer; after the cap layer is formed, performing an annealing operation; and after the annealing operation, removing the cap layer and the first metallic layer; wherein the annealing operation includes irradiating the cap layer, the first metallic layer and the dielectric layer with an energy beam, and after the annealing operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of manufacturing a circuit including a metal-oxide-semiconductor field effect transistor (MOSFET) disposed in a MOSFET region and a negative capacitance field effect transistor (NCFET) disposed in a NCFET region, the method comprising:
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forming a dielectric layer over a channel layer in the MOSFET region and the NCFET region; forming a first metallic layer over the dielectric layer in the MOSFET region and the NCFET region; after the first metallic layer is formed, performing an annealing operation only in the NCFET region; and after the annealing operation, removing the first metallic layer from the MOSFET region and the NCFET region, wherein the annealing operation includes irradiating the first metallic layer and the dielectric layer in the NCFET region with an energy beam, and after the annealing operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase in the NCFET region. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A method of manufacturing a circuit including a metal-oxide-semiconductor field effect transistor (MOSFET) disposed in a MOSFET region and a negative capacitance field effect transistor (NCFET) disposed in a NCFET region, the method comprising:
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forming a first dummy gate structure over a first fin structure formed in the MOSFET region and a second dummy gate structure over a second fin structure formed in the NCFET region; forming a first source/drain structure over the first fin structure on opposing sides of the first dummy gate structure and a second source/drain structure over the second fin structure on opposing sides of the second dummy gate structure; forming an interlayer dielectric layer over the first and second source/drain structures; removing the first dummy gate structure and the second dummy gate structure, thereby exposing a first channel region of the first fin structure and a second channel region of the first fin structure; forming a dielectric layer over the first and second channel regions; forming a first metallic layer over the dielectric layer; and after the first metallic layer is formed, performing an annealing operation only in the NCFET region; after the annealing operation, removing the first metallic layer from the MOSFET region and the NCFET region, wherein the annealing operation includes irradiating the first metallic layer and the dielectric layer in the NCFET region with an energy beam, and after the annealing operation, the dielectric layer becomes a ferroelectric layer including an orthorhombic crystal phase in the NCFET region. - View Dependent Claims (19, 20)
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Specification