MEMS pressure sensor and microphone devices having through-vias and methods of forming same
First Claim
1. A device comprising:
- a device chip comprising;
a conductive layer providing a first membrane for a first device and a second membrane for a second device different than the first device;
a first micro-electromechanical (MEMS) structure over and aligned with the first membrane; and
a second MEMS structure over and aligned with the second membrane;
aa carrier bonded to the device chip, wherein the carrier exposes a first surface of the first membrane and a second surface of the second membrane to ambient pressure; and
a cap bonded to the device chip, the device chip being interposed between the cap and the carrier, wherein the cap comprises a through via extending through a substrate, and wherein the cap and the device chip define;
a first cavity extending into the substrate, wherein the first MEMS structure and a third surface of the first membrane are disposed in the first cavity; and
a second cavity extending into the substrate, wherein the second MEMS structure and a fourth surface of the second membrane are disposed in the second cavity, and wherein the first cavity is completely separated from the second cavity.
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Abstract
A method embodiment includes providing a MEMS wafer. A portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer. The carrier wafer is etched to expose the first membrane and a first surface of the second membrane to an ambient environment. A MEMS structure is formed in the MEMS wafer. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure and a second sealed cavity including a second surface of the second membrane for the pressure sensor device. The cap wafer comprises an interconnect structure. A through-via electrically connected to the interconnect structure is formed in the cap wafer.
43 Citations
20 Claims
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1. A device comprising:
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a device chip comprising; a conductive layer providing a first membrane for a first device and a second membrane for a second device different than the first device; a first micro-electromechanical (MEMS) structure over and aligned with the first membrane; and a second MEMS structure over and aligned with the second membrane;
aa carrier bonded to the device chip, wherein the carrier exposes a first surface of the first membrane and a second surface of the second membrane to ambient pressure; and a cap bonded to the device chip, the device chip being interposed between the cap and the carrier, wherein the cap comprises a through via extending through a substrate, and wherein the cap and the device chip define; a first cavity extending into the substrate, wherein the first MEMS structure and a third surface of the first membrane are disposed in the first cavity; and a second cavity extending into the substrate, wherein the second MEMS structure and a fourth surface of the second membrane are disposed in the second cavity, and wherein the first cavity is completely separated from the second cavity. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A device comprising:
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a first chip comprising a conductive layer, wherein the conductive layer provides a first membrane for a first device and a second membrane for a second device different than the first device; a second chip bonded to a first side of the first chip by a plurality of eutectic bonds, the second chip comprising; a substrate, wherein a top surface of the first membrane is exposed to a pressure level of a first cavity extending into the substrate, and wherein a top surface of the second membrane is exposed to a pressure level of a second cavity extending into the substrate, the first cavity being sealed off from the second cavity by the eutectic bonds; and a plurality of through vias extending through the substrate; and a third chip bonded to a second side of the first chip, the second side being opposite the first side, wherein a first opening extending through the third chip exposes a bottom surface of the first membrane to an ambient pressure level. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A device comprising:
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a first chip comprising a conductive layer that provides a first membrane for a first device and a second membrane for a second device; a second chip bonded the first chip, the second chip comprising; a semiconductor substrate; an insulating layer on the semiconductor substrate; and a plurality of through vias extending through the semiconductor substrate, the insulating layer disposed between the plurality of through vias and the semiconductor substrate along a line perpendicular to a major surface of the semiconductor substrate; and a third chip bonded to the first chip, the first chip being interposed between the third chip and the second chip, wherein a first opening extending through the third chip exposes a first surface of the first membrane to an ambient pressure level, and wherein a second opening extending through the third chip exposes a second surface of the second membrane to the ambient pressure level. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification