Arrangements for Hall effect elements and vertical epi resistors upon a substrate

• US 10,520,559 B2
• Filed: 08/14/2017
• Issued: 12/31/2019
• Est. Priority Date: 08/14/2017
• Status: Active Grant

• Current Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Original Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Inventors: Cesaretti, Juan Manuel, Friedrich, Andreas P., Monreal, Gerardo A., Milesi, Alejandro Gabriel
• Primary Examiner(s): Lindsay, Jr., Walter L
• Assistant Examiner(s): Gonzalez, Milton
• Application Number:
  US15/676,148
• Publication Number:
  US 20190049529A1
• Time in Patent Office: 869 Days
• CPC Class Codes: G01R 33/0029 Treating the measured signals, e.g. removing offset or noise
• CPC Class Codes: G01R 33/0082 Compensation, e.g. compensating for temperature changes
• CPC Class Codes: G01R 33/075 Hall devices configured for spinning current measurements
• CPC Class Codes: G01R 33/077 Vertical Hall-effect devices
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 52/01 Manufacture or treatment
• CPC Class Codes: H10N 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00 MRAM devices H10B61/00

Abstract

Hall effect elements are driven by current generators that use vertical epi resistors disposed away from an edge of a substrate upon which, within which, or over which, the Hall effect elements, the current generators, and the vertical epi resistors are disposed.

Claims

1. An electronic circuit, comprising:

a semiconductor substrate having a surface, the surface of the semiconductor substrate having a width dimension;

an epitaxial layer disposed over the surface of the semiconductor substrate, the epitaxial layer having a first surface distal from the semiconductor substrate and a second surface proximate to the semiconductor substrate;

a first Hall effect element disposed in the epitaxial layer, wherein the first Hall effect element has a geometric center in a plane of the surface of the substrate;

a second Hall effect element disposed in the epitaxial layer, wherein the second Hall effect element has a geometric center in the plane of the surface of the substrate, wherein a line between the geometric centers of the first and second Hall effect element is parallel to the width dimension of the substrate, wherein the geometric center of the first Hall effect element has a first Hall effect element distance proximate to a first end of the width dimension and the geometric center of the second Hall effect element has a second Hall effect element distance proximate to a second end of the width dimension;

a first current generator configured to generate a first drive current that passes through the first Hall effect element, wherein the first current generator comprises;

a first vertical epi resistor disposed in the epitaxial layer and proximate to the first Hall effect element, wherein the first vertical epi resistor has a geometric center, and wherein the geometric center of the first vertical epi resistor has a first vertical epi resistor distance to a first end of the width dimension greater than or equal to the first Hall effect element distance, the electronic circuit further comprising;

a second current generator configured to generate a second drive current that passes through the second Hall effect element, wherein the second current generator comprises;

a second vertical epi resistor disposed in the epitaxial layer and proximate to the second Hall effect element, wherein the second vertical epi resistor has a geometric center, and wherein the geometric center of the second vertical epi resistor has a second vertical epi resistor distance to a second end of the width dimension greater than or equal to the second Hall effect element distance.

2. The electronic circuit of claim 1, wherein the first and second vertical epi resistors each comprise:

respective first and second pickups implanted upon and diffused into the first surface of the epitaxial layer; and

a respective buried structure disposed under the first surface of the epitaxial layer and under the respective first and second pickups, wherein the respective buried structure has a density of atoms that results in a low resistance path with a first resistance lower than a resistance of the epitaxial layer, wherein the first and second reference currents pass respectively from the respective first pickup, through a respective first region of the epitaxial layer, through the respective buried structure, and through a respective second region of the epitaxial layer to the respective second pickup.

3. The electronic circuit of claim 1, further comprising:

a first one or more additional vertical epi resistors coupled in series with or in parallel with the first vertical epi resistor, each having a respective geometric center, each respective geometric center of the first one or more additional vertical epi resistors having a respective vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance; and

a second one or more additional vertical epi resistors coupled in series with or in parallel with the second vertical epi resistor, each having a respective geometric center, each respective geometric center of the second one or more additional vertical epi resistors having a respective vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance.

4. The electronic circuit of claim 3, wherein the first and second vertical epi resistors and the first and second one or more additional vertical epi resistors each comprise:

respective first and second pickups implanted upon and diffused into the first surface of the epitaxial layer; and

a respective buried structure disposed under the first surface of the epitaxial layer and under the respective first and second pickups, wherein the respective buried structure has a density of atoms that results in a low resistance path with a first resistance lower than a resistance of the epitaxial layer, wherein the first and second reference currents pass respectively from the respective first pickup, through a respective first region of the epitaxial layer, through the respective buried structure, and through a respective second region of the epitaxial layer to the respective second pickup.

5. The electronic circuit of claim 1, wherein the first vertical epi resistor is operable to receive a first reference voltage resulting in a first reference current passing through the first vertical epi resistor, the first reference current related to the first drive current, wherein a resistance of the first vertical epi resistor, the first reference current, and the first drive current change in accordance with changes of a stress in the semiconductor substrate proximate to the first Hall effect element, and wherein the second vertical epi resistor is operable to receive a second reference voltage resulting in a second reference current passing through the second vertical epi resistor, the second reference current related to the second drive current, wherein a resistance of the second vertical epi resistor, the second reference current, and the second drive current change in accordance with changes of a stress in the semiconductor substrate proximate to the second Hall effect element.

6. The electronic circuit of claim 1, further comprising:

a third Hall effect element electrically coupled to the first Hall effect element and disposed proximate to the first Hall effect element; and

a fourth Hall effect element electrically coupled to the second Hall effect element and disposed proximate to the second Hall effect element.

7. The electronic circuit of claim 6, further comprising:

a first one or more additional vertical epi resistors coupled in series with or in parallel with the first vertical epi resistor, each having a respective geometric center, each respective geometric center of the first one or more additional vertical epi resistors having a respective vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance; and

a second one or more additional vertical epi resistors coupled in series with or in parallel with the second vertical epi resistor, each having a respective geometric center, each respective geometric center of the second one or more additional vertical epi resistors having a respective vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance.

8. The electronic circuit of claim 7, wherein the first and second vertical epi resistors and the first and second one or more additional vertical epi resistors each comprise:

respective first and second pickups implanted upon and diffused into the first surface of the epitaxial layer; and

a respective buried structure disposed under the first surface of the epitaxial layer and under the respective first and second pickups, wherein the respective buried structure has a density of atoms that results in a low resistance path with a first resistance lower than a resistance of the epitaxial layer, wherein the first and second reference currents pass respectively from the respective first pickup, through a respective first region of the epitaxial layer, through the respective buried structure, and through a respective second region of the epitaxial layer to the respective second pickup.

9. The electronic circuit of claim 6, wherein all of first drive current passes through the first and third Hall effect elements and wherein all of the second drive current passes through the second and fourth Hall effect elements.

10. The electronic circuit of claim 6, wherein the first drive current splits between the first and third Hall effect elements and wherein the second drive current splits between the second and fourth Hall effect elements.

11. The electronic circuit of claim 6, further comprising:

a third current generator configured to generate a third drive current that passes through the third Hall effect element, wherein the first current generator comprises;

a third vertical epi resistor disposed in the epitaxial layer and proximate to the third Hall effect element, wherein the third vertical epi resistor has a geometric center, and wherein the geometric center of the third vertical epi resistor has a third vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance; and

a fourth current generator configured to generate a fourth drive current that passes through the fourth Hall effect element, wherein the fourth current generator comprises;

a fourth vertical epi resistor disposed in the epitaxial layer and proximate to the fourth Hall effect element, wherein the fourth vertical epi resistor has a geometric center, and wherein the geometric center of the fourth vertical epi resistor has a fourth vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance.

12. The electronic circuit of claim 1, further comprising:

a third Hall effect element electrically coupled to the first Hall effect element and disposed proximate to the first Hall effect element; and

a fourth Hall effect element electrically coupled to the third Hall effect element and disposed proximate to the third Hall effect element

a fifth Hall effect element electrically coupled to the fourth Hall effect element and disposed proximate to the fourth Hall effect element; and

a sixth Hall effect element electrically coupled to the second Hall effect element and disposed proximate to the second Hall effect element

a seventh Hall effect element electrically coupled to the sixth Hall effect element and disposed proximate to the sixth Hall effect element; and

an eighth Hall effect element electrically coupled to the seventh Hall effect element and disposed proximate to the seventh Hall effect element.

13. The electronic circuit of claim 12, further comprising:

a first one or more additional vertical epi resistors coupled in series with or in parallel with the first vertical epi resistor, each having a respective geometric center, each respective geometric center of the first one or more additional vertical epi resistors having a respective vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance; and

a second one or more additional vertical epi resistors coupled in series with or in parallel with the second vertical epi resistor, each having a respective geometric center, each respective geometric center of the second one or more additional vertical epi resistors having a respective vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance.

14. The electronic circuit of claim 13, wherein the first and second vertical epi resistors and the first and second one or more additional vertical epi resistors each comprise:

respective first and second pickups implanted upon and diffused into the first surface of the epitaxial layer; and

a respective buried structure disposed under the first surface of the epitaxial layer and under the respective first and second pickups, wherein the respective buried structure has a density of atoms that results in a low resistance path with a first resistance lower than a resistance of the epitaxial layer, wherein the first and second reference currents pass respectively from the respective first pickup, through a respective first region of the epitaxial layer, through the respective buried structure, and through a respective second region of the epitaxial layer to the respective second pickup.

15. The electronic circuit of claim 12, wherein all of first drive current passes through the first, third, fourth, and fifth Hall effect elements and wherein all of the second drive current passes through the second, sixth, seventh, and eighth Hall effect elements.

16. The electronic circuit of claim 12, wherein the first drive current splits between the first, third, fourth, and fifth Hall effect elements and wherein the second drive current splits between the second, sixth, seventh, and eighth Hall effect elements.

17. The electronic circuit of claim 12, wherein the first, third, fourth, and fifth Hall effect elements are arranged in a line proximate to the first end of the width dimension of the substrate, and wherein the second, sixth, seventh and eighth Hall effect elements are arranged in a line proximate to and perpendicular to the second end of the width dimension of the substrate.

18. The electronic circuit of claim 12, wherein the first, third, fourth, and fifth Hall effect elements are arranged in a rectangular arrangement proximate to the first end of the width dimension of the substrate and distal from the second end, and wherein the second, sixth, seventh and eighth Hall effect elements are arranged in a rectangular arrangement proximate to and perpendicular to the second end of the width dimension of the substrate and distal from the first end.

19. The electronic circuit of claim 12, further comprising:

a third current generator configured to generate a third drive current that passes through the third Hall effect element, wherein the first current generator comprises;

a third vertical epi resistor disposed in the epitaxial layer and proximate to the third Hall effect element, wherein the third vertical epi resistor has a geometric center, and wherein the geometric center of the third vertical epi resistor has a third vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance;

a fourth current generator configured to generate a fourth drive current that passes through the fourth Hall effect element, wherein the fourth current generator comprises;

a fourth vertical epi resistor disposed in the epitaxial layer and proximate to the fourth Hall effect element, wherein the fourth vertical epi resistor has a geometric center, and wherein the geometric center of the fourth vertical epi resistor has a fourth vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance;

a fifth current generator configured to generate a fifth drive current that passes through the fifth Hall effect element, wherein the first current generator comprises;

a fifth vertical epi resistor disposed in the epitaxial layer and proximate to the fifth Hall effect element, wherein the fifth vertical epi resistor has a geometric center, and wherein the geometric center of the fifth vertical epi resistor has a fifth vertical epi resistor distance to the first end of the width dimension greater than or equal to the first Hall effect element distance;

a sixth current generator configured to generate a sixth drive current that passes through the sixth Hall effect element, wherein the sixth current generator comprises;

a sixth vertical epi resistor disposed in the epitaxial layer and proximate to the sixth Hall effect element, wherein the sixth vertical epi resistor has a geometric center, and wherein the geometric center of the sixth vertical epi resistor has a sixth vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance;

a seventh current generator configured to generate a seventh drive current that passes through the seventh Hall effect element, wherein the first current generator comprises;

a seventh vertical epi resistor disposed in the epitaxial layer and proximate to the seventh Hall effect element, wherein the seventh vertical epi resistor has a geometric center, and wherein the geometric center of the seventh vertical epi resistor has a seventh vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance; and

an eighth current generator configured to generate an eighth drive current that passes through the eighth Hall effect element, wherein the eighth current generator comprises;

an eighth vertical epi resistor disposed in the epitaxial layer and proximate to the eighth Hall effect element, wherein the eighth vertical epi resistor has a geometric center, and wherein the geometric center of the eighth vertical epi resistor has an eighth vertical epi resistor distance to the second end of the width dimension greater than or equal to the second Hall effect element distance.

20. A method of biasing a plurality of Hall effect elements, comprising:

generating a first reference current by generating a first voltage reference across a first vertical epi resistor disposed in an epitaxial layer over a semiconductor substrate, the epitaxial layer having a first surface distal from the semiconductor substrate and a second surface proximate to the semiconductor substrate;

injecting a first drive current into a first Hall effect element, wherein the first Hall effect element is disposed over the semiconductor substrate, wherein the first drive current is related to the first reference current, wherein a resistance of the first vertical epi resistor, the first reference current, and the first drive current change in accordance with changes of a stress in the semiconductor substrate;

generating a second reference current by generating a second voltage reference across a second vertical epi resistor disposed in an epitaxial layer over a semiconductor substrate, the epitaxial layer having a second surface distal from the semiconductor substrate and a second surface proximate to the semiconductor substrate;

injecting a second drive current into a second Hall effect element, wherein the second Hall effect element is disposed over the semiconductor substrate, wherein the second drive current is related to the second reference current, wherein a resistance of the second vertical epi resistor, the second reference current, and the second drive current change in accordance with changes of a stress in the semiconductor substrate, wherein the first Hall effect element has a geometric center in a plane of the surface of the substrate, wherein the second Hall effect element has a geometric center in the plane of the surface of the substrate, wherein a line between the geometric centers of the first and second Hall effect element is parallel to the width dimension of the substrate, wherein the geometric center of the first Hall effect element has a first Hall effect element distance proximate to a first end of the width dimension and the geometric center of the second Hall effect element has a second Hall effect element distance proximate to a second end of the width dimension, wherein the first vertical epi resistor has a geometric center, wherein the geometric center of the first vertical epi resistor has a first vertical epi resistor distance to a first end of the width dimension greater than or equal to the first Hall effect element distance, wherein the second vertical epi resistor has a geometric center, wherein the geometric center of the second vertical epi resistor has a second vertical epi resistor distance to a second end of the width dimension greater than or equal to the second Hall effect element distance.

21. An electronic circuit, comprising:

means for generating a first reference current by generating a first voltage reference across a first vertical epi resistor disposed in an epitaxial layer over a semiconductor substrate, the epitaxial layer having a first surface distal from the semiconductor substrate and a second surface proximate to the semiconductor substrate;

means for injecting a first drive current into a first Hall effect element, wherein the first Hall effect element is disposed over the semiconductor substrate, wherein the first drive current is related to the first reference current, wherein a resistance of the first vertical epi resistor, the first reference current, and the first drive current change in accordance with changes of a stress in the semiconductor substrate;

means for generating a second reference current by generating a second voltage reference across a second vertical epi resistor disposed in an epitaxial layer over a semiconductor substrate, the epitaxial layer having a second surface distal from the semiconductor substrate and a second surface proximate to the semiconductor substrate;

means for injecting a second drive current into a second Hall effect element, wherein the second Hall effect element is disposed over the semiconductor substrate, wherein the second drive current is related to the second reference current, wherein a resistance of the second vertical epi resistor, the second reference current, and the second drive current change in accordance with changes of a stress in the semiconductor substrate, wherein the first Hall effect element has a geometric center in a plane of the surface of the substrate, wherein the second Hall effect element has a geometric center in the plane of the surface of the substrate, wherein a line between the geometric centers of the first and second Hall effect element is parallel to the width dimension of the substrate, wherein the geometric center of the first Hall effect element has a first Hall effect element distance proximate to a first end of the width dimension and the geometric center of the second Hall effect element has a second Hall effect element distance proximate to a second end of the width dimension, wherein the first vertical epi resistor has a geometric center, wherein the geometric center of the first vertical epi resistor has a first vertical epi resistor distance to a first end of the width dimension greater than or equal to the first Hall effect element distance, wherein the second vertical epi resistor has a geometric center, wherein the geometric center of the second vertical epi resistor has a second vertical epi resistor distance to a second end of the width dimension greater than or equal to the second Hall effect element distance.