×

Memory device including mixed non-volatile memory cell types

  • US 10,521,130 B2
  • Filed: 11/20/2018
  • Issued: 12/31/2019
  • Est. Priority Date: 01/18/2017
  • Status: Active Grant
First Claim
Patent Images

1. An apparatus comprising:

  • a data line;

    a first plurality of sub-blocks coupled to the data line, each sub-block of the first plurality of sub-blocks including memory cell strings;

    a second plurality of sub-blocks coupled to the data line, each sub-block of the second plurality of sub-blocks including memory cell strings;

    a buffer circuit to receive first information; and

    a control unit to store second information in the first plurality of sub-blocks and to store third information in the second plurality of sub-blocks, wherein a value of the second information is based on a value of the first information received at the buffer circuit, and a value of the third information is based on the value of the second information.

View all claims
  • 4 Assignments
Timeline View
Assignment View
    ×
    ×