Semiconductor device and method for manufacturing the same

• US 10,522,568 B2
• Filed: 11/15/2018
• Issued: 12/31/2019
• Est. Priority Date: 07/10/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Sakakura, Masayuki
• Primary Examiner(s): Le, Thao P
• Application Number:
  US16/191,952
• Publication Number:
  US 20190088687A1
• Time in Patent Office: 411 Days
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/42 Transparent materials

Abstract

It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.

Claims

1. A liquid crystal display panel comprising:

a substrate;

a pixel portion over the substrate, the pixel portion comprising;

a pixel, the pixel comprising;

a gate electrode layer in contact with the substrate;

a first insulating layer over the gate electrode layer;

a semiconductor layer over the first insulating layer;

a source electrode layer and a drain electrode layer over the semiconductor layer;

a second insulating layer over the source electrode layer and the drain electrode layer; and

an electrode layer over the second insulating layer;

a terminal portion over the substrate, the terminal portion comprising;

a first conductive layer in contact with the substrate;

the first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

the second insulating layer over the second conductive layer; and

a third conductive layer over the second insulating layer,

wherein the third conductive layer is electrically connected to the first conductive layer and the second conductive layer,

wherein the third conductive layer is in contact with a top surface of the second conductive layer in an opening in the second insulating layer,

wherein the third conductive layer is in contact with no side surface of the second conductive layer,

wherein the gate electrode layer and the first conductive layer comprise the same material,

wherein the source electrode layer, the drain electrode layer and the second conductive layer are over and in contact with the first insulating layer and comprise the same material, and

wherein the electrode layer and the third conductive layer comprise the same material having a light transmitting property.

2. The liquid crystal display panel according to claim 1,

wherein the pixel portion further comprises a source wiring and a gate wiring,

wherein the source electrode layer is part of the source wiring,

wherein the gate electrode layer is part of the gate wiring, and

wherein the electrode layer overlaps with the source wiring and the gate wiring in a top view.

3. The liquid crystal display panel according to claim 1,

wherein the terminal portion is configured to be electrically connected to an FPC.

4. The liquid crystal display panel according to claim 1,

wherein an end portion of the drain electrode layer is surrounded by a U-shaped portion of the source electrode layer in a top view.

5. The liquid crystal display panel according to claim 1,

wherein the liquid crystal display panel is a horizontal electric field mode liquid crystal panel.

6. The liquid crystal display panel according to claim 1,

wherein the third conductive layer is in contact with the first conductive layer.

7. An electronic device comprising the liquid crystal display panel according to claim 1, and an FPC connected to the terminal portion.

8. A liquid crystal display panel comprising:

a substrate;

a pixel portion over the substrate, the pixel portion comprising;

a pixel, the pixel comprising;

a gate electrode layer in contact with the substrate;

a first insulating layer over the gate electrode layer;

a semiconductor layer over the first insulating layer;

a source electrode layer and a drain electrode layer over the semiconductor layer;

a second insulating layer over the source electrode layer and the drain electrode layer; and

an electrode layer over the second insulating layer;

a terminal portion over the substrate, the terminal portion comprising;

a first conductive layer in contact with the substrate;

the first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer;

the second insulating layer over the second conductive layer; and

a third conductive layer over the second insulating layer,

wherein the first insulating layer comprises a first opening and the second insulating layer comprises a second opening,

wherein the third conductive layer is electrically connected to the first conductive layer and the second conductive layer through the first opening and the second opening,

wherein the third conductive layer is in contact with a top surface of the second conductive layer in the second opening,

wherein an edge of the first opening is outside an area overlapping with the second opening,

wherein the gate electrode layer and the first conductive layer comprise the same material,

wherein the source electrode layer, the drain electrode layer and the second conductive layer are over and in contact with the first insulating layer and comprise the same material, and

wherein the electrode layer and the third conductive layer comprise the same material having a light transmitting property.

9. The liquid crystal display panel according to claim 8,

wherein the pixel portion further comprises a source wiring and a gate wiring,

wherein the source electrode layer is part of the source wiring,

wherein the gate electrode layer is part of the gate wiring, and

wherein the electrode layer overlaps with the source wiring and the gate wiring in a top view.

10. The liquid crystal display panel according to claim 8,

wherein the terminal portion is configured to be electrically connected to an FPC.

11. The liquid crystal display panel according to claim 8,

wherein an end portion of the drain electrode layer is surrounded by a U-shaped portion of the source electrode layer in a top view.

12. The liquid crystal display panel according to claim 8,

wherein the liquid crystal display panel is a horizontal electric field mode liquid crystal panel.

13. The liquid crystal display panel according to claim 8,

wherein the third conductive layer is in contact with the first conductive layer.

14. An electronic device comprising the liquid crystal display panel according to claim 8, and an FPC connected to the terminal portion.

15. The liquid crystal display panel according to claim 8,

wherein the third conductive layer is in contact with no side surface of the second conductive layer.