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Methods of manufacturing semiconductor device

  • US 10,522,694 B2
  • Filed: 09/28/2017
  • Issued: 12/31/2019
  • Est. Priority Date: 12/15/2016
  • Status: Active Grant
First Claim
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1. A method of manufacturing a semiconductor device, comprising:

  • forming a multi-layer structure of first semiconductor layers and second semiconductor layers alternately stacked in a first direction over a substrate;

    patterning the multi-layer structure into a fin structure;

    forming a sacrificial gate structure over the fin structure, the sacrificial gate structure covering a first part of the fin structure including a channel region and leaving a second part of the fin structure including source and drain regions exposed;

    forming source and drain epitaxial layers that wrap around the fin structure in the source and drain regions to form epitaxial source and drain structures, wherein each one of the source and drain epitaxial layers is a physically connected segment;

    removing the sacrificial gate structure to expose the channel region;

    removing the second semiconductor layers in the channel region thereby exposing the first semiconductor layers in the channel region to form spaced apart core layers in the in the channel region;

    forming one or more semiconductor shell layers at least partially around the core layers in the channel region to form multilayer semiconductor wires, each of the multilayer semiconductor wires comprising a core layer at least partially wrapped around with the one or more semiconductor shell layers; and

    forming a gate dielectric layer and a gate electrode layer around the multilayer semiconductor wires in the channel region.

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