Highly selective ion beam etch hard mask for sub 60nm MRAM devices

• US 10,522,753 B2
• Filed: 07/26/2019
• Issued: 12/31/2019
• Est. Priority Date: 04/12/2018
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yang, Yi, Shen, Dongna, Wang, Yu-Jen
• Primary Examiner(s): Tran, Thien F
• Application Number:
  US16/522,801
• Publication Number:
  US 20190348601A1
• Time in Patent Office: 158 Days
• Field of Search: None
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/80 Constructional details

Abstract

A via connection is provided through a dielectric layer to a bottom electrode. A MTJ stack is deposited on the dielectric layer and via connection. A top electrode is deposited on the MTJ stack. A selective hard mask and then a dielectric hard mask are deposited on the top electrode. The dielectric and selective hard masks are patterned and etched. The dielectric and selective hard masks and the top electrode are etched wherein the dielectric hard mask is removed. The top electrode is trimmed using IBE at an angle of 70 to 90 degrees. The selective hard mask, top electrode, and MTJ stack are etched to form a MTJ device wherein over etching into the dielectric layer surrounding the via connection is performed and re-deposition material is formed on sidewalls of the dielectric layer underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device.

Claims

1. A method for etching a magnetic tunneling junction (MTJ) structure, the method comprising:

providing a via connection through a dielectric layer to a bottom electrode;

depositing a MTJ stack on the dielectric layer and the via connection;

depositing a top electrode on the MTJ stack;

depositing a selective hard mask on the top electrode;

depositing a dielectric hard mask on the selective hard mask;

patterning and first etching the dielectric hard mask;

after the first etching, second etching the dielectric and the selective hard masks;

after the second etching, third etching the dielectric hard mask and the selective hard mask and the top electrode, the dielectric hard mask being consumed by the third etching;

after the third etching, trimming the top electrode; and

after the trimming, fourth etching the selective hard mask, the top electrode, and the MTJ stack to form a MTJ device, wherein the fourth etching etches into the dielectric layer surrounding the via connection so that a portion of the dielectric layer lines sidewalls of the via connection, and wherein the fourth etching re-deposits material on sidewalls of the dielectric layer lining the via connection and not on sidewalls of a barrier layer of the MTJ device.

2. The method according to claim 1, wherein the via connection includes a material selected from the group consisting of Ta, Ti, TaN, TiN, W, Cu, Mg, Ru, Cr, Co, Fe, Ni, and combinations thereof.

3. The method according to claim 1, wherein the top electrode includes a material selected from the group consisting of Ta, TaN, Ti, TiN, W, Cu, Mg, Ru, Cr, Co, Fe, Ni, and combinations thereof.

4. The method according to claim 1, wherein the selective hard mask is resistive to the trimming.

5. The method according to claim 1, wherein the selective hard mask comprises CVD deposited or spin-on carbon, CVD deposited TaC, or PVD deposited Al or Be.

6. The method according to claim 5, wherein:

if the selective hard mask includes carbon, the second etching includes ion beam etching (IBE) with O₂ alone or mixed with a halogen including Cl₂ and HBr; and

if the selective hard mask includes TaC, Al, or Be, the second etching includes IBE with a halogen based plasma including Cl₂ alone, or mixed with Ar and HBr.

7. The method according to claim 1 wherein the dielectric hard mask includes a material selected from the group consisting of SiO₂, SiN, SiON, SiC and SiCN.

8. The method according to claim 1, wherein the first etching includes reactive ion etching (RIE) with a fluorine carbon-based plasma, the fluorine carbon-based plasma including a fluid selected from the group consisting of CF₄, CHF₃, Ar, N₂, O₂, and combinations thereof.

9. The method according to claim 1, wherein the third etching includes reactive ion etching (RIE) with CF₄ or Cl₂ or IBE.

10. The method according to claim 1, wherein the trimming further includes application of RF power from about 500 W to about 1000 W for a duration of time from about 100 seconds to about 300 seconds.

11. The method according to claim 1, further comprising:

after the fourth etching, IBE trimming at an angle of 70 to 90 degrees with respect to a normal line of a top surface of the top electrode to remove the re-deposition material.

12. The method according to claim 1, further comprising:

encapsulating the MTJ device and the top electrode with a dielectric or metal oxide including SiO₂, SiN, SiON, SiC, SiCN, Al₂O₃ or MgO;

removing the selective hard mask; and

exposing a top surface of the top electrode by chemical mechanical polishing, RIE using a carbon fluorine plasma including CF₄, CHF₃, CH₂F₂, or C₄F₈ mixed with O₂, or RIE using a halogen plasma including Cl₂ mixed with O₂.

13. The method according to claim 1, wherein trimming the top electrode includes ion beam etching (IBE) at an angle of 70 to 90 degrees with respect to a normal line of a top surface of the top electrode.

14. A method for etching a magnetic tunneling junction (MTJ) structure, the method comprising:

providing a via connection through a dielectric layer to a bottom electrode;

depositing a MTJ stack on the dielectric layer and the via connection;

depositing a top electrode on the MTJ stack;

depositing a selective hard mask on the top electrode;

depositing a dielectric hard mask on the selective hard mask;

patterning and first etching the dielectric hard mask;

thereafter second etching the dielectric and the selective hard masks;

thereafter third etching the dielectric and selective hard masks and the top electrode wherein the dielectric hard mask is removed;

thereafter first trimming the top electrode using ion beam etching (IBE) at an angle of 70 to 90 degrees with respect to a normal line of a top surface of the top electrode;

thereafter fourth etching the selective hard mask, the top electrode, and the MTJ stack wherein over etching is performed wherein a MTJ device is formed and wherein the dielectric layer surrounding the via connection is etched into and wherein re-deposition material is formed on sidewalls of the dielectric layer underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device;

thereafter second trimming using IBE at an angle of 70 to 90 degrees with respect to a normal line of a top surface of the top electrode to remove the re-deposition material;

thereafter encapsulating the MTJ device and the top electrode with a dielectric or metal oxide; and

thereafter removing any remaining the selective hard mask and exposing a top surface of the top electrode.

15. The method according to claim 14, wherein the via connection includes a material selected from the group consisting of Ta, Ti, TaN, TiN, W, Cu, Mg, Ru, Cr, Co, Fe, Ni, and combinations thereof, the via connection having a width of less than 30 nm.

16. The method according to claim 14, wherein the top electrode includes a material selected from the group consisting of Ta, TaN, Ti, TiN, W, Cu, Mg, Ru, Cr, Co, Fe, Ni, and combinations thereof, the top electrode having a thickness from about 10 to about 100 nm.

17. The method according to claim 14, wherein the selective hard mask includes CVD deposited or spin-on carbon, CVD deposited TaC, or PVD deposited Al or Be.

18. The method according to claim 17, wherein:

if the selective hard mask includes carbon, the second etching includes IBE with O₂ alone or mixed with a halogen comprising Cl₂ and HBr; and

if the selective hard mask includes TaC, Al, or Be, the second etching includes IBE with a halogen based plasma including Cl₂ alone, or mixed with Ar and HBr.

19. The method according to claim 14, wherein the dielectric hard mask includes a material selected from the group consisting of SiO₂, SiN, SiON, SiC, SiCN, and combinations thereof, the dielectric hard mask having a thickness of at least about 90 nm.

20. The method according to claim 14, wherein the first trimming and the second trimming further includes applying RF power from about 500 W to about 1000 W for time from about 100 seconds to about 300 seconds.