Programmable circuit having multiple sectors

• US 10,523,207 B2
• Filed: 08/15/2014
• Issued: 12/31/2019
• Est. Priority Date: 08/15/2014
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: How, Dana, Atsatt, Sean R., Hutton, Michael David, Schmit, Herman Henry
• Primary Examiner(s): Kim, Seokjin
• Application Number:
  US14/460,548
• Publication Number:
  US 20160049941A1
• Time in Patent Office: 1,964 Days
• Field of Search: 326 9- 15, 326 37- 50, 326101-103, 716 16, 716 17, 716113, 716117
• CPC Class Codes: H03K 19/007 Fail-safe circuits
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/17732 Macroblocks
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources
• CPC Class Codes: H03K 19/1776 for memories
• CPC Class Codes: H03K 19/17764 for reliability

Abstract

Systems and methods relating to a programmable circuit. The programmable circuit includes multiple sectors. Each sector includes configurable functional blocks, configurable routing wires, configuration bits for storing configurations for the functional blocks and routing wires, and local control circuitry for interfacing with the configuration bits to configure the sector. The programmable circuit may include global control circuitry for interfacing with the local control circuitry to configure the sector. Each sector may be independently operable and/or operable in parallel with other sectors. Operating the programmable circuit may include using the local control circuitry to interface with the configurations bit and configure the sector. Additionally, operating the programmable circuit may include using the global control circuitry to interface with respective local control circuitry and configure the sector.

Claims

1. A programmable circuit comprising:

a plurality of sectors, wherein each sector comprises;

at least one configurable functional block;

a plurality of configurable routing wires;

a memory having at least one configuration bit that stores configurations for the at least one configurable functional block and the plurality of configurable routing wires; and

local control circuitry comprising a state machine, wherein the state machine configures the sector by programming the at least one configuration bit into the memory and generates signals that drive clock lines of the sector; and

global control circuitry that sends at least one respective configuration bit to respective local control circuitry for each sector of the plurality of sectors;

wherein a first signal generated by a first state machine of a first local control circuitry of a first sector of the plurality of sectors is configured to drive at least a first clock line of the first sector at a first frequency;

wherein a second signal generated by a second state machine of a second local control circuitry of a second sector of the plurality of sectors is configured to drive at least a second clock line of the second sector at a second frequency; and

wherein the first frequency is different from the second frequency.

2. The programmable circuit of claim 1, wherein the global control circuitry transmits one or more global signals to respective local control circuitry for each sector of the plurality of sectors, wherein the one or more global signals relate to at least one of a configuration mode, a test mode, and a clocking mode for each sector.

3. The programmable circuit of claim 1, wherein each sector further comprises:

a power supply; and

power control circuitry in communication with the local control circuitry.

4. The programmable circuit of claim 1, wherein the state machine of the local control circuitry for each sector:

retrieves data stored in the at least one configuration bit;

detects whether the stored data has changed due to a single-event upset; and

in response to detecting that the stored data has changed, transmits corrected data for the at least one configuration bit.

5. The programmable circuit of claim 1, wherein at least one of the state machine of the local control circuitry and the global control circuitry configures a first sector of the plurality of sectors, wherein the first sector comprises a different number of configurable functional blocks, configurable routing wires, or both, than a second sector of the plurality of sectors.

6. The programmable circuit of claim 1, wherein at least one of the state machine of the local control circuitry and the global control circuitry:

configures a first portion of the sector; and

configures the first portion as a redundancy region for a second portion of the sector;

wherein the first portion comprises a different number of configurable functional blocks, configurable routing wires, or both, than the second portion.

7. The programmable circuit of claim 1, wherein the local control circuitry for each sector includes a stored-program processor.

8. A method for operating a programmable circuit comprising global control circuitry and a plurality of sectors, each sector comprising at least one configurable functional block, a plurality of configurable routing wires, a memory configured to store a respective bitstream that configures the at least one configurable functional block and the plurality of configurable routing wires to execute a respective program, a plurality of bit lines and a plurality of word lines configured to modify and read back the at least one configuration bit, a plurality of shift registers configured to access the plurality of bit lines and the plurality of word lines, and local control circuitry comprising a state machine, the method comprising:

programming, using the state machine, the respective bitstream into the memory to configure the sector via the plurality of bit lines and the plurality of word lines by controlling the plurality of shift registers to execute the respective program, wherein the state machine is configured to generate signals internally that drive the plurality of word lines, the plurality of bit lines, and multiplexers of the sector; and

sending, using the global control circuitry, at least one respective configuration bit of the respective bitstream to respective local control circuitry for each sector of the plurality of sectors.

9. The method of claim 8, further comprising:

transmitting, using the global control circuitry, one or more global signals to respective local control circuitry for each sector of the plurality of sectors, wherein the one or more global signals relate to at least one of a configuration mode, a test mode, and a clocking mode for each sector.

10. The method of claim 8, wherein each sector further comprises a power supply and power control circuitry in communication with the local control circuitry.

11. The method of claim 8, further comprising:

retrieving, using the local control circuitry, data stored in the memory;

detecting, using the local control circuitry, whether the data has changed due to a single-event upset; and

in response to detecting that the data has changed, transmitting, using the local control circuitry, corrected data for the data that has changed.

12. The method of claim 8, further comprising configuring, using at least one of the local control circuitry and the global control circuitry, a first sector of the plurality of sectors, wherein the at least one configurable functional block, the memory, or both, of the first sector, are of a different size than the at least one configurable functional block, the memory, or both, of a second sector of the plurality of sectors.

13. The method of claim 8, further comprising:

configuring, using at least one of the local control circuitry and the global control circuitry, a first portion of the sector; and

designating the first portion as a redundancy region for a second portion of the sector;

wherein the at least one configurable functional block, the memory, or both, of the first portion, are of a different size than the at least one configurable functional block, the memory, or both, of the second portion.

14. The method of claim 8, wherein the local control circuitry for each sector includes at least one of a state machine and a stored-program processor.

15. A programmable circuit comprising:

a plurality of sectors, wherein each sector comprises;

at least one configurable functional block;

a plurality of configurable routing wires;

a memory configured to store a respective bitstream that configures the at least one configurable functional block and the plurality of configurable routing wires to execute a respective program; and

local control circuitry comprising a state machine, wherein the state machine configures the sector by;

programming the respective bitstream into the memory;

determining if at least one configuration bit of the respective bitstream programmed in the memory has changed;

determining corrected data for the at least one configuration bit; and

programming the corrected data for the at least one configuration bit into the memory;

wherein each sector is independently operable and operable in parallel with other sectors based on configuration by a respective local control circuitry.

16. The programmable circuit of claim 15, wherein each sector further comprises:

a power supply; and

power control circuitry in communication with the local control circuitry.

17. The programmable circuit of claim 15, wherein the at least one of the state machine and the stored-program processor:

configures a first sector of the plurality of sectors;

wherein the first sector comprises a different number of configurable functional blocks, configurable routing wires, or both, than a second sector of the plurality of sectors.

18. The programmable circuit of claim 15, wherein the at least one of the state machine and the stored-program processor:

configures a first portion of the sector; and

designates the first portion as a redundancy region for a second portion of the sector;

wherein the first portion comprises a different number of configurable functional blocks, configurable routing wires, or both, than the second portion.