Protection schemes for MEMS switch devices

• US 10,529,518 B2
• Filed: 09/19/2016
• Issued: 01/07/2020
• Est. Priority Date: 09/19/2016
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices, Inc.
• Inventors: Fitzgerald, Padraig Liam, Parthasarathy, Srivatsan, Salcedo, Javier A.
• Primary Examiner(s): Tran, Thienvu V
• Assistant Examiner(s): Thomas, Lucy M
• Application Number:
  US15/269,086
• Publication Number:
  US 20180083439A1
• Time in Patent Office: 1,205 Days
• Field of Search: 361 56
• CPC Class Codes: B81C 1/0023 Packaging together an electronic processing unit die and a micromechanical structure die MEMS packages B81B7/0032; MEMS packaging processes B81C1/00261
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: H01H 59/0009 making use of micromechanics
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0262 including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/16235 Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/19105 in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H02H 9/041 using a short-circuiting device
• CPC Class Codes: H02H 9/046 : responsive to excess voltage appearing at terminals of integrated circuits protection by specific structural integration design H01L27/0248

Abstract

Micro-electromechanical switch (MEMS) devices can be fabricated using integrated circuit fabrication techniques and materials. Such switch devices can provide cycle life and insertion loss performance suiting for use in a broad range of applications including, for example, automated test equipment (ATE), switching for measurement instrumentation (such as a spectrum analyzer, network analyzer, or communication test system), and uses in communication systems, such as for signal processing. MEMS devices can be vulnerable to electrical over-stress, such as associated with electrostatic discharge (ESD) transient events. A solid-state clamp circuit can be incorporated in a MEMS device package to protect one or more MEMS devices from damaging overvoltage conditions. The clamp circuit can include single or multiple blocking junction structures having complementary current-voltage relationships, such as to help linearize a capacitance-to-voltage relationship presented by the clamp circuit.

Claims

1. An electronic circuit having a micro-electromechanical switch device and a solid-state clamp circuit, the electronic circuit comprising:

an integrated circuit device package, comprising;

a first substrate;

an integrated micro-electromechanical switch device located upon or within the first substrate;

a hermetic enclosure defining a hermetically isolated region to isolate the integrated micro-electromechanical switch device from a surrounding environment;

a solid-state clamp circuit electrically coupled to the micro-electromechanical switch and configured to suppress or inhibit damage to the micro-electromechanical switch due to a transient overvoltage condition, the solid-state clamp circuit comprising complementary branches of a series arrangement of first and second integrated diode devices where the first and second integrated diode devices in a same branch have complementary capacitance-to-voltage relationships, the first and second integrated diode devices respectively comprising laterally-separated anode and cathode regions arranged to provide protection for positive-going and negative-going voltage swings with respect to a reference node; and

a control circuit electrically coupled to the integrated micro-electromechanical switch, the control circuit configured to receive a logic-level signal and to provide a control signal to electrostatically actuate the micro-electromechanical switch in response to the received logic-level signal.

2. The electronic circuit of claim 1, wherein the first and second integrated diode devices are arranged to provide a linear or approximately linear overall capacitance-to-voltage relationship for the clamp circuit.

3. The electronic circuit of claim 1, wherein the first integrated diode devices comprise a first type of diode defined by a first arrangement of regions of positive and negative conductivity types within a semiconductor device;

and

wherein the second integrated diode devices comprise a second type of diode defined by a second arrangement of positive and negative conductivity types within the semiconductor device, the second arrangement including conductive regions having a complementary conductivity type as compared to corresponding regions defining the first type of diode.

4. The electronic circuit of claim 2, wherein the first and second integrated diode devices are coupled to silicon-controlled rectifier (SCR) device structures integrated with the first and second integrated diode devices on a commonly-shared integrated circuit substrate.

5. The electronic circuit of claim 1, wherein the solid-state clamp circuit is monolithically integrated using a silicon-on-insulator substrate configuration.

6. The electronic circuit of claim 1, wherein the solid-state clamp circuit is heterogeneously integrated using a second substrate.

7. The electronic circuit of claim 6, wherein the second substrate includes a metallization layer defining a reference node;

and

wherein the reference node is conductively isolated from a conductive region defined at least in part by an electrically-insulating material included as a portion of the hermetic enclosure.

8. The electronic circuit of claim 6, wherein the solid-state clamp circuit is stacked upon at least a portion of the hermetic enclosure.

9. The electronic circuit of claim 6, wherein the second substrate comprises a portion of the hermetic enclosure.

10. The electronic circuit of claim 1, wherein the solid-state clamp circuit is co-integrated upon or within the same substrate as the microelectronic switch device.

11. The electronic circuit of claim 10, wherein at least a portion of the solid-state clamp circuit is located within the substrate directly above or directly below the micro-electromechanical switch device.

12. The electronic circuit of claim 10, wherein at least a portion of the solid-state clamp circuit is located in a region laterally adjacent to the micro-electromechanical switch device.

13. The electronic circuit of claim 1, wherein the solid-state clamp circuit and the micro-electromechanical switch device are placed upon a laminate substrate, the laminate substrate including a material different from the substrate upon which or in which the micro-electromechanical switch is fabricated.

14. The electronic circuit of claim 13, wherein the solid-state clamp circuit comprises discrete solid-state devices placed upon the laminate.

15. The electronic circuit of claim 14, wherein the discrete solid-state devices comprise one or more semiconductor dice mounted upon the laminate.

16. The electronic circuit of claim 1, wherein the control circuit and the clamp circuit are configured to suppress damage to the micro-electromechanical switch during hot-switching operations, where the micro-electromechanical switch is carrying a current.

17. The electronic circuit of claim 1, wherein the control circuit and the clamp circuit are configured to suppress damage to the micro-electromechanical switch during an electrostatic discharge (ESD) transient event.

18. The electronic circuit of claim 1, comprising multiple micro-electromechanical switches and clamp circuits.

19. The electronic circuit of claim 18, wherein the multiple micro-electromechanical switches are arranged to provide switching for automated test equipment.

20. The electronic circuit of claim 18, wherein the multiple micro-electromechanical switches are coupled to one or more other circuits to provide a portion of an electronic communication system.

21. The electronic circuit of claim 20, wherein the electronic communication system comprises a wireless or mobile device.

22. The electronic circuit of claim 18, wherein the multiple micro-electromechanical switches are arranged to provide a portion of a measurement instrument.

23. The electronic circuit of claim 1, wherein the micro-electromechanical switch comprises a first conductive terminal, a second conductive terminal and a control terminal, the micro-electromechanical switch configured to provide a conductive state or an open-circuit state between the first and second terminals in response to the control terminal.

24. The electronic circuit of claim 23, wherein the impedance presented by the micro-electromechanical switch in the conductive state provides conduction of signals between the terminals while meeting a specified insertion loss and a specified return loss for operation in a frequency range of the signals selected from a range from about 100 megahertz (MHz) to about 50 gigahertz (GHz).

25. The electronic circuit of claim 23, wherein the impedance presented by the micro-electromechanical switch in the conductive state provides conduction of signals between the terminals while meeting a specified insertion loss and a specified return loss for operation up to a frequency of about 6 gigahertz (GHz).

26. The electronic circuit of claim 1, wherein adjacent integrated diode devices are electrically isolated from each other by trench regions in the solid-state clamp circuit.

27. An electronic circuit having a micro-electromechanical switch device and a solid-state clamp circuit, the electronic circuit comprising:

an integrated circuit device package, comprising;

a first substrate;

an integrated micro-electromechanical switch device located upon or within the first substrate;

a hermetic enclosure defining a hermetically isolated region to isolate the integrated micro-electromechanical switch device from a surrounding environment; and

a solid-state clamp circuit electrically coupled to the micro-electromechanical switch and configured to suppress or inhibit damage to the micro-electromechanical switch due to a transient overvoltage condition, the solid-state clamp circuit comprising complementary branches of a series arrangement of first and second integrated diode devices where the first and second integrated diode devices in a same branch have complementary capacitance-to-voltage relationships,

wherein the first and second integrated diode devices are coupled to silicon-controlled rectifier (SCR) device structures integrated with the first and second integrated diode devices on a commonly-shared integrated circuit substrate.

28. The electronic circuit of claim 27, wherein the first and second integrated diode devices respectively comprise laterally-separated anode and cathode regions.

29. The electronic circuit of claim 27, wherein the first integrated diode devices comprise a first type of diode defined by a first arrangement of regions of positive and negative conductivity types within a semiconductor device, and

wherein the second integrated diode devices comprise a second type of diode defined by a second arrangement of positive and negative conductivity types within the semiconductor device, the second arrangement including conductive regions having a complementary conductivity type as compared to corresponding regions defining the first type of diode.

30. The electronic circuit of claim 27, wherein the micro-electromechanical switch device comprises an active-opening architecture, further comprising a control circuit configured to provide a de-actuation signal to electrostatically open the micro-electromechanical switch device.

31. The electronic circuit of claim 27, wherein adjacent integrated diode devices are electrically isolated from each other by trench regions in the solid-state clamp circuit.

37. The electronic circuit of claim 27, wherein the micro-electromechanical switch device includes a cantilevered arm that is electrostatically attracted to another portion of the micro-electromechanical switch in response to the actuation signal to actuate the switch establishing conduction between the first and second conductive terminals.

32. A method for protecting a micro-electromechanical switch device, the method comprising:

coupling a signal to a hermetically-enclosed integrated circuit device package housing a micro-electromechanical switch device;

suppressing or inhibiting damage to the micro-electromechanical switch device from the signal, using a solid-state clamp circuit electrically coupled to the micro-electromechanical switch device during a transient overvoltage condition, the solid-state clamp included as a portion of the integrated circuit device package; and

compensating for a non-linear capacitance-to-voltage relationship of a diode included as a portion of the solid-state clamp circuit using a series arrangement of complementary branches of first and second integrated diode devices where the first and second integrated diode devices in a same branch have complementary capacitance-to-voltage relationships, the first and second integrated diode devices respectively comprising laterally-separated anode and cathode regions;

wherein a state of the micro-electromechanical switch device is controlled using a control circuit configured to receive a logic-level signal and to provide a control signal to electrostatically actuate the micro-electromechanical switch device in response to the received logic-level signal, the control circuit included as a portion of the integrated circuit device package.

33. The method of claim 32, comprising controlling the clamp circuit using silicon-controlled rectifier (SCR) device structures integrated with the first and second integrated diode devices on a commonly-shared integrated circuit substrate, the SCR device structures electrically coupled to the first and second integrated diode devices.

34. The method of claim 32, wherein the solid-state clamp circuit is monolithically integrated using a silicon-on-insulator substrate configuration.

35. The method of claim 34, wherein the silicon-on-insulator substrate configuration comprises an oxide layer located on the substrate, and a silicon layer located on the oxide layer;

and

wherein solid-state clamp circuit is formed upon or within a silicon layer and one or more conductive regions interconnecting the solid-state clamp circuit with one or more terminals of the micro-electromechanical switch device.

36. The method of claim 32, comprising providing a conductive state between a first conductive terminal and a second conductive terminal of the integrated circuit device package using the micro-electromechanical switch device in response to a received logic-level signal, the logic-level signal processed by the control circuit included as a portion of the integrated circuit device package to provide an actuation signal to the micro-electromechanical switch device.

38. The method of claim 36, comprising providing a non-conductive state isolating the first and second conductive terminals of the integrated circuit device package in response to the received logic-level signal, the logic-level signal processed by the control circuit.

39. The method of claim 38, wherein the control circuit is configured to inhibit the actuation signal to provide the non-conductive state.

40. The method of claim 38, wherein the control circuit is configured to provide a de-actuation signal to electrostatically open the micro-electromechanical switch device using an active-opening micro-electromechanical switch device architecture.

41. The method of claim 34, comprising presenting an impedance using the micro-electromechanical switch device to provide conduction of signals between terminals of the integrated circuit device package while meeting a specified insertion loss and a specified return loss for operation in a frequency range of the signals selected from a range from about 100 megahertz (MHz) to about 50 gigahertz (GHz).

42. The method of claim 41, wherein the impedance presented by the micro-electromechanical switch in the conductive state providing conduction of signals between the terminals includes meeting a specified insertion loss and a specified return loss for operation up to a frequency of about 6 gigahertz (GHz).

43. The method of claim 32, wherein the suppressing or inhibiting the damage to the micro-electromechanical switch device from the signal includes suppressing or inhibiting damage during a hot-switching operation where the micro-electromechanical switch state is changed while the switch is carrying a current.

44. The method of claim 32, wherein the suppressing or inhibiting the damage to the micro-electromechanical switch device from the signal includes suppressing or inhibiting damage from an electrostatic discharge (ESD) transient event.