Pulsed level shift and inverter circuits for GaN devices
First Claim
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1. A level shift circuit, comprising:
- a first inverter circuit comprising;
a first input terminal,a first output terminal,a first GaN-based transistor having a gate coupled to the first input terminal, a drain coupled to the first output terminal, and a source coupled to a ground, anda first pull up device coupled between the drain of the first GaN-based transistor and a power supply; and
a second inverter circuit comprising;
a second input terminal,a second output terminal,a second GaN-based transistor having a gate coupled to the second input terminal, a drain coupled to the second output terminal, and a source coupled to the ground, anda second pull up device coupled between the drain of the second GaN-based transistor and the power supply,wherein the first pull up device comprises a third GaN-based transistor having a gate driven with a voltage based on the voltage at the second output terminal, and wherein the first, second, and third GaN-based transistors are of the same conductivity type.
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Abstract
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
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Citations
6 Claims
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1. A level shift circuit, comprising:
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a first inverter circuit comprising; a first input terminal, a first output terminal, a first GaN-based transistor having a gate coupled to the first input terminal, a drain coupled to the first output terminal, and a source coupled to a ground, and a first pull up device coupled between the drain of the first GaN-based transistor and a power supply; and a second inverter circuit comprising; a second input terminal, a second output terminal, a second GaN-based transistor having a gate coupled to the second input terminal, a drain coupled to the second output terminal, and a source coupled to the ground, and a second pull up device coupled between the drain of the second GaN-based transistor and the power supply, wherein the first pull up device comprises a third GaN-based transistor having a gate driven with a voltage based on the voltage at the second output terminal, and wherein the first, second, and third GaN-based transistors are of the same conductivity type. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification