Device arrangement structure assembly and test method

• US 10,535,572 B2
• Filed: 06/27/2016
• Issued: 01/14/2020
• Est. Priority Date: 04/15/2016
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liao, Chun Hao, Chen, Chu Fu, Liu, Mingo, Yean, Chiou Jun
• Primary Examiner(s): Muse, Ismail A
• Application Number:
  US15/193,542
• Publication Number:
  US 20170301659A1
• Time in Patent Office: 1,296 Days
• CPC Class Codes: G01R 31/2635 Testing light-emitting diodes, laser diodes or photodiodes
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 25/165 Containers
• CPC Class Codes: H01L 2933/0033 relating to semiconductor body packages
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination

Abstract

An assembly includes a wafer having a top wafer surface and a wafer circumference and a device arrangement structure. The device arrangement structure includes a first surface having a perimeter, the perimeter being encircled by the wafer circumference in a plan view. The device arrangement structure also includes an array of devices, each device of the array of devices having an electrical contact on the first surface. The assembly has an adhesive element that affixes the device arrangement structure in a stationary position relative to the wafer.

Claims

1. A method comprising:

mounting a device arrangement structure to a wafer using an adhesive element to form a test assembly, the device arrangement structure comprising an array of devices electrically accessible at a top surface of the device arrangement structure, wherein the adhesive element comprises a tape layer having an adhesive surface attached to the top surface of the device arrangement structure and attached to a surface of the wafer, the wafer having a wafer diameter; and

performing an automated test sequence on the array of devices by;

controlling movement of the test assembly using an automated test system configured to test wafers having the wafer diameter, and

electrically accessing the array of devices at the top surface of the device arrangement structure.

2. The method of claim 1, wherein using the adhesive element further comprises applying an adhesive layer between the device arrangement structure and the wafer.

3. The method of claim 1, wherein:

at least one device of the array of devices comprises a light emitting diode (LED) and a control circuit; and

performing the automated test sequence comprises performing an electrical test of at least one control circuit of the at least one device.

4. The method of claim 1, wherein controlling movement of the test assembly using the automated test system comprises automatically positioning a device of the array of devices under a test apparatus.

5. The method of claim 1, wherein electrically accessing the array of devices at the top surface of the device arrangement structure comprises electrically accessing an entirety of the array of devices.

6. The method of claim 1, wherein:

the test assembly is one test assembly of a plurality of test assemblies; and

controlling movement of the test assembly using the automated test system comprises automatically loading each test assembly of the plurality of test assemblies onto a moveable test platform.

7. The method of claim 6, wherein controlling movement of the test assembly using the automated test system further comprises automatically retrieving each test assembly of the plurality of test assemblies from a wafer container configured to store wafers having the wafer diameter.

8. The method of claim 1, further comprising dismounting the device arrangement structure from the wafer.

9. A method comprising:

mounting a light emitting diode (LED) device structure to a wafer using an adhesive element to form a test assembly, the LED device structure comprising a plurality of LED devices electrically accessible at a top surface of the LED device structure, the wafer having a wafer diameter, wherein using the adhesive element comprises applying a tape layer having an adhesive surface contacting a portion of the top surface of the LED device structure and a portion of the wafer free of the LED device structure;

performing an automated test sequence on the plurality of LED devices by;

controlling movement of the test assembly using an automated test system configured to test wafers having the wafer diameter, and

electrically accessing the plurality of LED devices at the top surface of the LED device structure; and

dismounting the LED device structure from the wafer by applying heat.

10. The method of claim 9, wherein mounting the LED device structure to the wafer comprises mounting an LED display device structure having a rectangular shape.

11. The method of claim 9, wherein performing the automated test sequence on the plurality of LED devices comprises performing an electrical test of a control circuit of an LED device of the plurality of LED devices.

12. The method of claim 11, wherein

the control circuit of the LED device of the plurality of LED devices is in a bottom layer of the LED device structure, and

electrically accessing the plurality of LED devices at the top surface of the LED device structure comprises contacting a top layer of the LED device structure with a test fixture.

13. The method of claim 9, wherein electrically accessing the plurality of LED devices comprises electrically accessing the plurality of LED devices ranging from 1000 to 1,000,000 LED devices.

14. The method of claim 9, wherein performing the automated test sequence on the plurality of LED devices comprises executing a wafer acceptance test (WAT) routine.

15. The method of claim 9, wherein using the adhesive element comprises adhering a surface of an insulting portion of the LED device structure located beneath the plurality of LED devices to the wafer.

16. A method of performing an automated test sequence on a plurality of test assemblies, the method comprising:

applying an adhesive element to each device arrangement structure of a plurality of device arrangement structures and to a corresponding wafer of a plurality of wafers to form a plurality of test assemblies, wherein applying the adhesive element comprises applying an adhesive layer between a bottom surface of each device arrangement structure of the plurality of device arrangement structures and a top surface of the corresponding wafer of the plurality of wafers and applying a tape layer having an adhesive surface over a peripheral portion of a top surface of each device arrangement structure of the plurality of device arrangement structures and a portion of the corresponding wafer of the plurality of wafers to fix each device arrangement structure of the plurality of device arrangement structures to the corresponding wafer of the plurality of wafers;

automatically retrieving each test assembly of the plurality of test assemblies from a wafer container configured to store wafers having a wafer diameter of the plurality of wafers;

automatically loading each test assembly of the plurality of test assemblies onto a moveable test platform in contact with a bottom surface of each test assembly;

controlling movement of each test assembly of the plurality of test assemblies using an automated test system configured to test wafers having the wafer diameter; and

electrically accessing an array of devices electrically accessible at a top surface of each test assembly of the plurality of test assemblies,

wherein, for each test assembly of the plurality of test assemblies,

the automatically loading the each test assembly onto the moveable test platform comprises the moveable test platform contacting a bottom surface of the wafer of the each test assembly, and

the electrically accessing the array of devices comprises contacting, with a test fixture, the top surface of the device arrangement structure of the each test assembly, the device arrangement structure having a perimeter with a largest dimension smaller than the wafer diameter.

17. The method of claim 16, wherein controlling movement of the each test assembly using the automated test system comprises automatically positioning a device of the array of devices under the test fixture.

18. The method of claim 16, wherein performing the automated test sequence on the plurality of test assemblies comprises executing a wafer acceptance test (WAT) routine.

19. The method of claim 16, wherein performing the automated test sequence on the plurality of test assemblies comprises performing the automated test sequence on the plurality of test assemblies numbering from 20 to 30 test assemblies.

20. The method of claim 16, wherein performing the automated test sequence on the plurality of LED devices comprises performing an electrical test of a control circuit of a device structure of the plurality of device structures.