Method for forming solder bumps using sacrificial layer

• US 10,535,592 B2
• Filed: 03/26/2018
• Issued: 01/14/2020
• Est. Priority Date: 10/30/2015
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Lewandowski, Eric P., Nah, Jae-Woong, Sorce, Peter J.
• Primary Examiner(s): Mayo, III, William H.
• Assistant Examiner(s): Robinson, Krystal
• Application Number:
  US15/936,014
• Publication Number:
  US 20180218971A1
• Time in Patent Office: 659 Days
• Field of Search: 174257
• CPC Class Codes: H01L 21/0273 characterised by the treatment of photoresist layers
• CPC Class Codes: H01L 21/32051 Deposition of metallic or metal-silicide layers
• CPC Class Codes: H01L 21/32133 by chemical means only
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 23/49866 characterised by the materials materials of the substrates H01L23/14, of the lead-frames H01L23/49579
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H05K 2203/04 Soldering or other types of metallurgic bonding using molten metal H05K2203/128
• CPC Class Codes: H05K 3/064 Photoresists
• CPC Class Codes: H05K 3/12 using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
• CPC Class Codes: H05K 3/3457 Solder materials or compositions; Methods of application thereof
• CPC Class Codes: H05K 3/4007 Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457

Abstract

A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.

Claims

1. A circuit comprising:

a plurality of spaced apart electrically conductive contact pads located directly on a surface of a substrate;

a solder resist layer located between each electrically conductive contact pad and located directly on the substrate, wherein a portion of the solder resist layer is disposed onto a topmost surface of each electrically conductive pad;

a solder bump disposed on a physically exposed surface of each electrically conductive pad and partially disposed on a topmost surface of each solder resist layer, wherein the solder bump comprises tin that is alloyed with at least a first metal selected from a rare earth metal, wherein the rare earth metal is non-homogeneously dispersed throughout the solder bump; and

a metallic layer composed of at least the first metal located between the solder bump and each electrically conductive pad.

2. The circuit of claim 1, wherein the substrate is selected from the group consisting of an organic substrate, a glass interposer, and a silicon interposer.

3. The circuit of claim 1, wherein the solder resist layer has a height that is greater than a height of each electrically conductive contact pad.

4. The circuit of claim 3, wherein the solder bond has a height that is greater than the height of the solder resist layer.

5. The circuit of claim 1, wherein the tin is further alloyed with a second metal different from the first metal.

6. The circuit of claim 5, wherein the second metal is selected from at least one of Cu, Zn, Ag, Au, and Bi.

7. The circuit of claim 1, wherein the rare earth metal comprises scandium, yttrium, lanthanum, cerium, praseodymium, promethium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, or lutetium.

8. The circuit of claim 1, wherein the solder bump comprises up to 3 weight percent of the first metal.

9. The circuit of claim 1, wherein the first metal consists of 0.5 to 2 weight percent of one of lutetium, lanthanum, cerium, ytterbium, and neodymium.

10. The circuit of claim 1, wherein the first metal consists of 0.25 to 1 weight percent of a combination of lanthanum and cerium.

11. The circuit of claim 1, wherein the first metal consists of 0.05 to 1 weight percent of cerium.

12. A circuit comprising:

a plurality of spaced apart electrically conductive contact pads located directly on a surface of a substrate;

a solder resist layer located between each electrically conductive contact pad and located directly on the substrate, wherein a portion of the solder resist layer is disposed onto a topmost surface of each electrically conductive pad; and

a solder bump disposed on a physically exposed surface of each electrically conductive pad and partially disposed on a topmost surface of each solder resist layer, wherein the solder bump comprises an alloy of tin and a rare earth metal, wherein the rare earth metal is non-homogeneously dispersed throughout the solder bump.

13. The circuit of claim 12, wherein the substrate is selected from the group consisting of an organic substrate, a glass interposer, and a silicon interposer.

14. The circuit of claim 12, wherein the solder resist layer has a height that is greater than a height of each electrically conductive contact pad.

15. The circuit of claim 14, wherein the solder bond has a height that is greater than the height of the solder resist layer.

16. The circuit of claim 12, wherein the tin is further alloyed with at least one of Cu, Zn, Ag, Au, and Bi.

17. The circuit of claim 12, wherein the rare earth metal comprises scandium, yttrium, lanthanum, cerium, praseodymium, promethium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, or lutetium.