Ultra-low-power injection locked oscillator for IQ clock generation
First Claim
1. An injection locked oscillator (ILO) circuit, comprising:
- a first clock injection stage to receive a first input clock signal having a first frequency and to generate a first injection signal based on the first input clock signal, the first clock injection stage including a first programmable inverter in series with a first self-biased inverter;
a second clock injection stage to receive a second input clock signal having the first frequency and to generate a second injection signal based on the second input clock signal, the second clock injection stage including a second programmable inverter in series with a second self-biased inverter; and
a phase locked loop (PLL) stage to receive the first injection signal and the second injection signal and to generate an output clock signal based at least in part on the first frequency, the phase locked loop stage including a multi-stage ring oscillator configured to generate the output clock signal based at least in part on the first injection signal and the second injection signal.
1 Assignment
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Accused Products
Abstract
An injection locked oscillator (ILO) circuit is disclosed. The ILO circuit may include a first clock injection stage including a first programmable inverter in series with a first self-biased inverter. The first injection stage may receive a first input clock having a first frequency and generate a first injection signal. The ILO circuit may further include a second clock injection stage including a second programmable inverter in series with a second self-biased inverter. The second injection stage may receive a second input clock signal having the first frequency and to generate a second injection signal. The ILO may further include a phase locked loop (PLL) stage including a multi-stage ring oscillator. The PLL stage may receive the first injection signal and the second injection signal and to generate an output clock signal based at least in part on the first frequency.
6 Citations
20 Claims
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1. An injection locked oscillator (ILO) circuit, comprising:
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a first clock injection stage to receive a first input clock signal having a first frequency and to generate a first injection signal based on the first input clock signal, the first clock injection stage including a first programmable inverter in series with a first self-biased inverter; a second clock injection stage to receive a second input clock signal having the first frequency and to generate a second injection signal based on the second input clock signal, the second clock injection stage including a second programmable inverter in series with a second self-biased inverter; and a phase locked loop (PLL) stage to receive the first injection signal and the second injection signal and to generate an output clock signal based at least in part on the first frequency, the phase locked loop stage including a multi-stage ring oscillator configured to generate the output clock signal based at least in part on the first injection signal and the second injection signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for operating an injection locked oscillator (ILO) circuit, comprising:
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providing a first input clock signal, having a first frequency, to a first clock injection stage including a first programmable inverter in series with a first self-biased inverter, and generating a first injection signal using the first clock injection stage; providing a second input clock signal, having the first frequency, to a second clock injection stage including a second programmable inverter coupled to a second self-biased inverter, and generating a second injection signal using the second clock injection stage; providing the first injection signal and the second injection signal to a phase locked loop (PLL) stage configured to generate an output clock signal based at least in part on the first frequency, the PLL stage comprising a multi-stage ring oscillator. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. An injection locked oscillator (ILO) circuit, comprising:
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means for providing a first input clock signal, having a first frequency, to a first clock injection stage including a first programmable inverter in series with a first self-biased inverter, and generating a first injection signal based on the first input clock signal; means for providing a second input clock signal, having the first frequency, to a second clock injection stage including a second programmable inverter in series with a second self-biased inverter, and generating a second injection signal based on the second input clock signal; means for providing the first injection signal and the second injection signal to a phase locked loop (PLL) stage configured to generate an output clock signal based at least in part on the first frequency, the PLL stage comprising a multi-stage ring oscillator.
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Specification