Display device

• US 10,539,846 B2
• Filed: 08/23/2018
• Issued: 01/21/2020
• Est. Priority Date: 01/15/2015
• Status: Active Grant

• Current Assignee: Japan Display Incorporated
• Original Assignee: Japan Display Incorporated
• Inventors: Yamaguchi, Yohei, Ishida, Arichika, Miyake, Hidekazu, Miyake, Hiroto, Suzumura, Isao
• Primary Examiner(s): Han, Jonathan
• Application Number:
  US16/109,834
• Publication Number:
  US 20180364509A1
• Time in Patent Office: 516 Days
• Field of Search: 257223, 257227, 257291, 257292, 257439, 257443, 257655, 257E271, 257E27125, 257E27112, 257E29117, 257E29145, 257E29147, 257E29151, 257E29182, 257E29202, 257E29273-E29299, 257E29314, 257E2932, 257E23016
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/13439 characterised by their electrical, optical, physical properties; materials therefor; method of making
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136218 Shield electrodes
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/13685 Top gates
• CPC Class Codes: G02F 2202/10 semiconductor
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

Claims

1. A semiconductor device comprising:

an insulating substrate;

a semiconductor layer above the insulating substrate;

a first electrode layer and a second electrode layer which are electrically connected to the semiconductor layer;

a first metal layer opposed to a first surface of the semiconductor layer;

a first insulating layer between the first metal layer and the semiconductor layer;

a second metal layer opposed to a second surface of the semiconductor layer;

a second insulating layer between the second metal layer and the semiconductor layer;

a third metal layer electrically connecting the first metal layer and the second metal layer via one contact hole penetrating the first insulating film and the second insulating film, wherein

the first electrode layer, the second electrode layer, and the third metal layer are all formed of the same material, and

the third metal layer directly contacts a top surface and a side surface of the second metal layer and a top surface of the first metal layer.

2. The semiconductor device of claim 1, wherein the semiconductor layer is formed of an oxide semiconductor.

3. The semiconductor device of claim 1, wherein the first metal layer or the second metal layer includes a gate electrode.

4. The semiconductor device of claim 1, wherein the first insulating layer or the second insulating layer includes a gate insulating film.

5. The semiconductor device of claim 1, wherein the first electrode layer and the second electrode layer contact a top surface of the semiconductor layer which is the first surface or the second surface.