Memristive dot product engine for vector processing
First Claim
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1. A memristive dot product system for vector processing, comprising:
- a crossbar array having a number of memory elements, each memory element comprising a transistor and a memristor having more than two conductance levels;
a vector input register; and
a vector output register.
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Abstract
A memristive dot-product system for vector processing is described. The memristive dot-product system includes a crossbar array having a number of memory elements. Each memory element includes a memristor. Each memory element includes a transistor. The system also includes a vector input register. The system also includes a vector output register.
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Citations
20 Claims
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1. A memristive dot product system for vector processing, comprising:
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a crossbar array having a number of memory elements, each memory element comprising a transistor and a memristor having more than two conductance levels; a vector input register; and a vector output register. - View Dependent Claims (2, 3, 4, 5, 6, 7, 11, 12)
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8. A memristive dot-product engine for vector processing, comprising:
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a crossbar array comprising a number of memory locations, each memory location comprising a memory element to store information corresponding to a value contained in an N×
M matrix and a transistor to control current flow through the memory element, the transistor receiving a plurality of different gate voltages corresponding to conductance levels of the memory element;an input register comprising N voltage inputs, each voltage input corresponding to a value contained in a vector having N values; and an output register comprising M voltage outputs. - View Dependent Claims (9, 10, 13, 14)
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15. A method for vector-processing using a memristive dot product engine, comprising:
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providing a crossbar array comprising M columns, N rows and N×
M memory locations, each memory location comprising a memristor and a transistor, an input register comprising N voltage inputs, and an output register comprising M voltage outputs, the memristor of each memory location programmable via a plurality of different current levels controlled by a corresponding plurality of different gate voltages of the transistor of the memory location;setting memristance values at the N×
M memory locations within the crossbar array, the memristance values corresponding to row and column values of an N×
M matrix, wherein the memristance value at memory location Ni,Mj is set by applying a programming voltage across the memristor at memory location Ni,Mj;setting input voltages at the N voltage inputs, the input voltages corresponding to values of an N×
1 vector to be multiplied with the N×
M matrix;determining output voltages at the M voltage outputs, each output voltage corresponding to the current output at each of the M columns of the crossbar array; and representing the M×
1 vector result of the multiplication of the N×
M matrix and the N×
1 vector. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification