Multi integrated circuit chip carrier package
First Claim
1. An electronic device fabrication method comprising:
- positioning a multiple IC chip carrier against a carrier deck that comprises a plurality of alignment protrusions;
aligning a lid, comprising a plurality of alignment receptacles, with the multiple IC chip carrier by receiving the plurality of alignment protrusions within the plurality of alignment receptacles;
connecting the lid to the multiple IC chip carrier and connecting the lid to each IC chip of the multiple IC chip carrier; and
removing the multiple IC chip carrier from the carrier deck.
1 Assignment
0 Petitions
Accused Products
Abstract
A multi integrated circuit (IC) chip package includes multiple IC chips, a carrier, and a lid. The IC chips may be connected to the carrier. Alternatively, each IC chip may be connected to an interposer and multiple interposers may be connected to the carrier. The carrier may be positioned within a carrier deck. The lid may be positioned relative to carrier by aligning one or more alignment receptacles within the lid with one or more respective alignment protrusions of the carrier deck. A compression fixture cover may contact the lid and exert a force toward the carrier deck, respective lid pedestals may be loaded toward respective IC chips, and an integral lid foot may be loaded toward the carrier. While under compression, thermal interface material between respective lid pedestals and respective IC chips and seal band material between the integral foot and the carrier may be cured.
27 Citations
20 Claims
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1. An electronic device fabrication method comprising:
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positioning a multiple IC chip carrier against a carrier deck that comprises a plurality of alignment protrusions; aligning a lid, comprising a plurality of alignment receptacles, with the multiple IC chip carrier by receiving the plurality of alignment protrusions within the plurality of alignment receptacles; connecting the lid to the multiple IC chip carrier and connecting the lid to each IC chip of the multiple IC chip carrier; and removing the multiple IC chip carrier from the carrier deck. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A multiple integrated circuit (IC) chip carrier package fabrication system comprising:
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a carrier deck comprising a carrier recess and a plurality of alignment protrusions; a multiple IC chip carrier comprising multiple IC chips, the multiple IC chip carrier positioned within the carrier recess; and a lid comprising multiple IC chip pockets that each have a IC chip pedestal, an underside integral lid foot, and a lid brim that includes a plurality of alignment receptacles, wherein the plurality of alignment protrusions are positioned within the plurality of alignment receptacles and wherein the underside integral lid foot is connected to the multiple IC chip carrier and wherein each of the IC chip pedestals is connected to an IC chip of the multiple IC chip carrier. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A multiple IC chip carrier package fabrication method comprising:
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positioning a multiple IC chip carrier against a carrier deck that comprises a plurality of alignment protrusions; aligning a lid, comprising a plurality of alignment receptacles, with the multiple IC chip carrier by receiving the plurality of alignment protrusions within the plurality of alignment receptacles; connecting the lid to the multiple IC chip carrier and connecting the lid to each IC chip of the multiple IC chip carrier; and removing the multiple IC chip carrier from the carrier deck. - View Dependent Claims (19, 20)
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Specification