Method for depositing a group IV semiconductor and related semiconductor device structures

• US 10,541,333 B2
• Filed: 05/21/2018
• Issued: 01/21/2020
• Est. Priority Date: 07/19/2017
• Status: Active Grant

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM IP Holding B.V. (ASM International NV)
• Inventors: Tolle, John, Margetis, Joe
• Primary Examiner(s): Fan, Bo
• Application Number:
  US15/985,298
• Publication Number:
  US 20190027605A1
• Time in Patent Office: 610 Days
• Field of Search: 257631, 438789
• CPC Class Codes: H01L 21/02529 Silicon carbide
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02535 including tin
• CPC Class Codes: H01L 21/02579 P-type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/167 further characterised by the doping material H01L29/1604 takes precedence
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7851 with the body tied to the substrate

Abstract

A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

Claims

1. A method of depositing a Group IV semiconductor on a surface of a substrate comprising;

providing a substrate within a reaction chamber;

heating the substrate to a deposition temperature;

exposing the substrate to at least one Group IV precursor; and

exposing the substrate to at least one Group IIIA dopant precursor, wherein the at least one Group IIIA dopant precursor comprises at least one of;

a borohydride, and an organic borohydride, a halide, or an organohalide;

wherein exposing the substrate to the at least one Group IV precursor and exposing the substrate to the at least one Group IIIA dopant precursor are performed at the same time such that the at least one Group IV precursor and the at least one Group IIIA dopant precursor flow into the reaction chamber at the same time;

wherein a dopant species is incorporated into the Group IV semiconductor as the Group IV semiconductor is deposited.

2. The method of claim 1, wherein the at least one Group IIIA dopant precursor comprises a borohydride selected from the group of:

gallium borohydride (Ga(BH₄)₃), aluminum borohydride (Al(BH₄)₃), or indium borohydride (In(BH₄)₃).

3. The method of claim 1, wherein the at least one Group IIIA dopant precursor comprises a borohydride having the general formula Y_xM(BH₄)_3-x, wherein Y is independently chosen from hydrogen, deuterium, chlorine, bromine, and iodine;

M is Group IIIA metal independently chosen from gallium, aluminum, and indium; and

x is an integer from 0-2.

4. The method of claim 1, wherein the at least one Group IIIA dopant precursor comprises an organic borohydride having the formula R_xM(BH₄)_3-x, wherein R is independently chosen from CH₃, C₂H₅, C₆H₅, CF₃SO₃, and NH₂;

M is a Group IIIA metal independently chosen from gallium, aluminum, and indium; and

x is integer from 1-3.

5. The method of claim 1, wherein the Group IIIA dopant precursor comprises a halide having the general formula Z_xMY_3-x, wherein Z is independently chosen from hydrogen, deuterium, chlorine, bromine, and iodine;

M is Group IIIA metal independently chosen from gallium, aluminum, and indium;

Y is a halide independently chosen from chlorine, bromine, and iodine; and

x is an integer from 0-3.

6. The method of claim 5, wherein the Group IIIA dopant precursor comprises a halide having the general formula (Z_xMY_3-x)₂, wherein Z is independently chosen from hydrogen, deuterium, chlorine, bromine, and iodine;

M is Group IIIA metal independently chosen from gallium, aluminum, and indium;

Y is a halide independently chosen from chlorine, bromine, and iodine; and

x is an integer from 0-3.

7. The method of claim 1, wherein the Group IIIA dopant precursor comprises an organohalide having the general formula R_xMY_3-x, wherein R is independently chosen from CH₃, C₂H₅, C₆H₅, CF₃SO₃, and NH₂;

M is group IIIA metal independently chosen from gallium, aluminum, and indium;

Y is a halide independently chosen from chlorine, bromine, and iodine; and

x is an integer from 0-3.

8. The method of claim 1, wherein heating the substrate to a deposition temperature further comprises heating the substrate to a temperature between approximately 280°

C. and approximately 700°

C.

9. The method of claim 1, wherein exposing the substrate to at least one Group IV precursor further comprises selecting the at least one Group IV precursor to comprise trisilane (Si₃H₈), tetrasilane (Si₄H₁₀), isopentasilane (Si₅H₁₂), neopentasilane (Si₅H₁₂), dichlorosilane (DCS), germane (GeH₄), digermane (Ge₂H₆), trigermane (Ge₃H₈), germylsilane (GeH₆Si), tin tetrachloride (SnCl₄), or methylsilane (CH₃—

SiH₃).

10. The method of claim 1, wherein depositing a Group IV semiconductor on a surface of the substrate further comprises depositing at least one of silicon (Si), germanium (Ge), silicon germanium (Si_1-xGe_x), silicon germanium carbide (Si_1-x-yGe_xC_y), germanium tin (Ge_1-xSn_x), germanium silicon tin (Ge_1-x-ySi_xSn_y), germanium silicon tin carbide (Ge_1-x-ySi_xSn_yC_x), silicon tin (Si_1-xSn_x), silicon tin carbide (Si_1-x-ySn_xC_y), or silicon carbide (Si_1-xC_x).

11. The method of claim 1, wherein depositing a Group IV semiconductor on a surface of the substrate further comprises depositing the Group IV semiconductor with a doping concentration of greater than approximately 1×

10²⁰ carriers per cubic centimeter.

12. The method of claim 1, wherein exposing the substrate to at least one Group IIIA dopant precursor further comprises exposing the substrate to at least one of an organic borohydride or an organohalide.

13. The method of claim 12, wherein exposing the substrate to at least one of an organic borohydride or an organohalide further comprising incorporating carbon into the deposited Group IV semiconductor, the atomic percentage of carbon in the Group IV semiconductor being greater than approximately 0.5 at-%.

14. The method of claim 1, wherein exposing the substrate to at least one Group IIIA dopant precursor further comprises exposing the substrate to at least one of a borohydride or an organic borohydride.

15. The method of claim 14, wherein exposing the substrate to at least one of a borohydride or an organic borohydride further comprises incorporating a boron dopant and a further Group IIIA dopant into the deposited Group IV semiconductor.