Intelligent voltage regulator

• US 10,545,519 B2
• Filed: 11/19/2018
• Issued: 01/28/2020
• Est. Priority Date: 03/12/2007
• Status: Active Grant

• Current Assignee: Tamiras Per Pte Ltd LLC (Intellectual Ventures LLC)
• Original Assignee: Tamiras Per Pte Ltd LLC (Intellectual Ventures LLC)
• Inventors: Wright, David G.
• Primary Examiner(s): Hernandez, William
• Application Number:
  US16/195,653
• Publication Number:
  US 20190188168A1
• Time in Patent Office: 435 Days
• Field of Search: 323234, 323265, 323282, 323283, 323284, 323299, 327306, 327331, 327332, 327530, 327538, 327540, 327541, 327543
• CPC Class Codes: G05F 1/10 Regulating voltage or current G05F1/02 takes precedence; for electric railways B60M3/02
• CPC Class Codes: G05F 1/46 wherein the variable actually regulated by the final control device is dc G05F1/625 takes precedence
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H03L 5/02 of power
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A voltage regulator includes a programming interface via which programming instructions may be applied to a processor of the voltage regulator. The voltage regulator operates the processor according to the programming instructions to select one of multiple active internally-generated analog voltage levels to determine an output voltage level of the voltage regulator.

Claims

1. An apparatus, comprising:

a voltage regulator having an external interface; and

one or more devices coupled to the voltage regulator via the external interface, the one or more devices including a device regulated by the voltage regulator, wherein the voltage regulator includes;

a variable voltage generator configured to receive an input voltage and to generate an output voltage selected from a plurality of output voltages based, at least in part, on a selection signal corresponding to a plurality of power operational states of the device regulated by the voltage regulator; and

a processor configured to execute instructions, wherein the processor is further configured to obtain programming instructions via an input of the external interface and to provide the selection signal to the variable voltage generator according to the programming instructions to cause the variable voltage generator to generate the selected output voltage in accordance with a selected one of the power operational states and provide the selected output voltage to the output of the external interface.

2. The apparatus of claim 1, wherein one or more first operational states of the plurality of power operational states is a lower power state than one or more second operational states of the plurality of power operational states.

3. The apparatus of claim 2, wherein the processor is further configured to provide the selection signal to the variable voltage generator according to the programming instructions to cause the variable voltage generator to generate a lower selected output voltage for the one or more first operational states.

4. The apparatus of claim 2, wherein the processor is further configured to provide a programmable wake up signal via the external interface to wake the device regulated by the voltage regulator from the one or more first operational states.

5. The apparatus of claim 4, wherein the processor is further configured to generate the programmable wake up signal in response to user-activation of a system event.

6. The apparatus of claim 1, wherein one of the plurality of power operational states corresponds to a normal-power state.

7. The apparatus of claim 1, wherein the external interface further comprises a communication bus input configured to receive an indication of the selected one of the plurality of power operational states.

8. The apparatus of claim 1, wherein the voltage regulator further includes:

a non-volatile memory coupled to the processor, wherein the non-volatile memory is configured to receive the programming instructions from an input of the external interface, to store the programming instructions, and to provide the programming instructions to the processor.

9. The apparatus of claim 1, wherein the device regulated by the voltage regulator comprises a central processing unit (CPU).

10. The apparatus of claim 1, further comprising a motor controlled by the device regulated by the voltage regulator.

11. The apparatus of claim 1, wherein the voltage regulator further comprises:

a transistor including a source, a drain, and a gate, wherein the source is coupled to the input voltage; and

a controller coupled to the gate, the controller to turn on the transistor based on the selection signal from the processor;

wherein the controller is further coupled to the drain to maintain a linear feedback system configured to maintain the selected output voltage.

12. The apparatus of claim 1, wherein the voltage regulator is configured to detect its output load condition and output the selected output voltage in a case that a load is below an operational range associated with the voltage regulator.

13. The apparatus of claim 1, wherein the voltage regulator is configured to monitor a signal generated by the device regulated by the voltage regulator, wherein the selected output voltage is based at least in part on the signal.

14. The apparatus of claim 13, wherein the signal is indicative of a state of the device regulated by the voltage regulator.

15. The apparatus of claim 1, wherein the voltage regulator further includes a linear feedback system configured to maintain the selected output voltage.

16. An apparatus, comprising:

a bus; and

a voltage regulator having an external interface with an input coupled to the bus, the voltage regulator including;

a variable voltage generator configured to receive an input voltage and to generate an output voltage selected from a plurality of output voltages to power a device; and

a processor configured to execute instructions, wherein the processor is configured to obtain programming instructions received over the input and via the bus to control the variable voltage generator according to the programming instructions to cause the variable voltage generator to generate the selected output voltage.

17. The apparatus of claim 16, wherein the processor is further configured to:

identify a current power operational state of the device; and

control the variable voltage generator in accordance with the current power operational state.

18. The apparatus of claim 16, wherein the voltage regulator further includes:

a non-volatile memory coupled to the processor, wherein the non-volatile memory is configured to receive the programming instructions from the bus, to store the programming instructions, and to provide the programming instructions to the processor.

19. The apparatus of claim 16, wherein the device comprises a central processing unit (CPU).

20. The apparatus of claim 19, further comprising a motor controlled by the CPU.

21. The apparatus of claim 19, wherein the CPU is coupled to the bus, and wherein the CPU is configured to output the processing instructions to the bus.

22. A system, comprising:

a bus;

a central processing unit (CPU) attached to the bus; and

a voltage regulator having an external interface with an input attached to the bus, wherein the voltage regulator is configured to generate a selected output voltage to power the CPU, and wherein the voltage regulator includes;

a variable voltage generator configured to receive an input voltage and to generate the output voltage selected from a plurality of output voltages; and

a processor configured to;

communicate directly with the CPU using one or more digital signals transmitted over the bus to obtain programming instructions; and

control the variable voltage generator according to the programming instructions to cause the variable voltage generator to generate the selected output voltage.

23. The system of claim 22, wherein the CPU comprises a first CPU, and wherein the processor comprises a second CPU that is different than the first CPU.

24. The system of claim 22, further comprising a motor controlled by the CPU.

25. The system of claim 22, wherein at least one of the digital signals identifies a current power operational state of the CPU, and wherein the processor is further configured to control the variable voltage generator in accordance with the current power operational state.