Methods, apparatus, and system for reducing leakage current in semiconductor devices
First Claim
1. A method, comprising:
- forming a semiconductor substrate comprising a well region containing a first impurity;
forming a gate on the semiconductor substrate above the well region;
implanting at least one second impurity, of a type opposite the first impurity, in the well region on each side of the gate and to a depth above a bottom of the well region, to form two second impurity regions each having a first impurity concentration;
removing an upper portion of each second impurity region, to yield two source/drain (S/D) cavities above two depletion regions, wherein the two depletion regions are essentially not disposed on sides of the two S/D cavities; and
growing epitaxially a doped S/D region in each S/D cavity, wherein each doped S/D region comprises at least one third impurity of the same type as the at least one second impurity, wherein each doped S/D region has a second impurity concentration greater than the first impurity concentration.
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Accused Products
Abstract
Methods, apparatus, and systems for forming a semiconductor substrate comprising a well region containing a first impurity; forming a gate on the semiconductor substrate above the well region; implanting a second impurity, of a type opposite the first impurity, in the well region on each side of the gate and to a depth above a bottom of the well region, to form two second impurity regions each having a first concentration; removing an upper portion of each second impurity region, to yield two source/drain (S/D) cavities above two depletion regions; and growing epitaxially a doped S/D region in each S/D cavity, wherein each S/D region comprises the second impurity having a second concentration greater than the first concentration.
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Citations
14 Claims
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1. A method, comprising:
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forming a semiconductor substrate comprising a well region containing a first impurity; forming a gate on the semiconductor substrate above the well region; implanting at least one second impurity, of a type opposite the first impurity, in the well region on each side of the gate and to a depth above a bottom of the well region, to form two second impurity regions each having a first impurity concentration; removing an upper portion of each second impurity region, to yield two source/drain (S/D) cavities above two depletion regions, wherein the two depletion regions are essentially not disposed on sides of the two S/D cavities; and growing epitaxially a doped S/D region in each S/D cavity, wherein each doped S/D region comprises at least one third impurity of the same type as the at least one second impurity, wherein each doped S/D region has a second impurity concentration greater than the first impurity concentration. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A system, comprising:
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a semiconductor device processing system to manufacture a semiconductor device; and a processing controller operatively coupled to said semiconductor device processing system, said processing controller configured to control an operation of the semiconductor device processing system; wherein the semiconductor device processing system is adapted to; form a semiconductor substrate comprising a well region containing a first impurity; form a gate on the semiconductor substrate above the well region; implant at least one second impurity, of a type opposite the first impurity, in the well region on each side of the gate and to a depth above a bottom of the well region, to form two second impurity regions each having a first impurity concentration; remove an upper portion of each of the two second impurity regions, to yield two source/drain (S/D) cavities above two depletion regions, wherein the two depletion regions are essentially not disposed on sides of the two S/D cavities; and grow epitaxially a doped S/D region in each S/D cavity, wherein each S/D region comprises at least one third impurity of the same type as the at least one second impurity, wherein each doped S/D region has a second impurity concentration greater than the first impurity concentration. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification