Active matrix substrate method of manufacturing active matrix substrate, and display device

• US 10,551,704 B2
• Filed: 06/07/2017
• Issued: 02/04/2020
• Est. Priority Date: 06/15/2016
• Status: Active Grant

• Current Assignee: JDI Design and Development GK
• Original Assignee: JOLED Inc.
• Inventors: Matsuo, Eri, Kinoshita, Tomoatsu, Toyota, Motohiro, Hiromasu, Yasunobu
• Primary Examiner(s): Garber, Charles D
• Assistant Examiner(s): Christopher, Steven M
• Application Number:
  US15/615,834
• Publication Number:
  US 20170363926A1
• Time in Patent Office: 972 Days
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate

Abstract

Provided is an active matrix substrate that includes a substrate, a thin film transistor, an electrode layer, and a second insulating film. The thin film transistor is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes. The oxide semiconductor layer includes a first region as a channel region. The electrode layer is level with the gate electrode, is provided in a different region from the thin film transistor, and includes a first end. The second insulating film is provided between the substrate and the electrode layer and includes a second end at a more retreated position than the first end of the electrode layer. The oxide semiconductor layer further includes a second region having lower resistance than the first region. The electrode layer is electrically coupled, at the first end, to the second region of the oxide semiconductor layer.

Claims

1. An active matrix substrate, comprising:

a substrate;

a thin film transistor that is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes, the oxide semiconductor layer including a first region as a channel region, the gate electrode being disposed in confronted relation with the first region of the oxide semiconductor layer with a first insulating film in between, and the source and drain electrodes being electrically coupled to the oxide semiconductor layer;

an electrode layer in a different region from the thin film transistor, and includes a first end adjacent to the thin film transistor; and

a second insulating film that is provided between the substrate and the electrode layer and includes a second end adjacent to the thin film transistor, wherein the second end is farther from the thin film transistor than the first end of the electrode layer,

the oxide semiconductor layer further including a second region having lower resistance than the first region, and

the electrode layer being electrically coupled, at the first end, to the second region of the oxide semiconductor layer, wherein

the electrode layer directly contacts both a top surface of the second insulating film and a side surface of the second insulating film.

2. An active matrix substrate, comprising:

a substrate;

a thin film transistor that is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes, the oxide semiconductor layer including a first region as a channel region, the gate electrode being disposed in confronted relation with the first region of the oxide semiconductor layer with a first insulating film in between, and the source and drain electrodes being electrically coupled to the oxide semiconductor layer;

an electrode layer in a different region from the thin film transistor, and includes a first end adjacent to the thin film transistor; and

a second insulating film that is provided between the substrate and the electrode layer and includes a second end adjacent to the thin film transistor, wherein the second end is farther from the thin film transistor than the first end of the electrode layer,

the oxide semiconductor layer further including a second region having lower resistance than the first region, and

the electrode layer being electrically coupled, at the first end, to the second region of the oxide semiconductor layer, wherein

a bottom-most surface of the electrode layer is closer to the substrate than a top-most surface of the second insulating film.

3. An active matrix substrate, comprising:

a substrate;

a thin film transistor that is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes, the oxide semiconductor layer including a first region as a channel region, the gate electrode being disposed in confronted relation with the first region of the oxide semiconductor layer with a first insulating film in between, and the source and drain electrodes being electrically coupled to the oxide semiconductor layer;

an electrode layer in a different region from the thin film transistor, and includes a first end adjacent to the thin film transistor; and

a second insulating film that is provided between the substrate and the electrode layer and includes a second end adjacent to the thin film transistor, wherein the second end is farther from the thin film transistor than the first end of the electrode layer,

the oxide semiconductor layer further including a second region having lower resistance than the first region, and

the electrode layer being electrically coupled, at the first end, to the second region of the oxide semiconductor layer, wherein

the electrode layer directly contacts the second region.