Dynamic reference current sensing using multiple reference cells
First Claim
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1. A circuit comprising:
- a memory cell configured to generate a cell current having a cell current value;
a first reference cell configured to generate a first current having a first current value;
a second reference cell configured to generate a second current having a second current value;
a current generating circuit configured to generate a reference current having a reference current value based on the first current value and the second current value; and
a sense amplifier comprising;
a comparison node; and
a buffer comprising a single input terminal coupled to the comparison node,wherein the sense amplifier is configured tosum, at the comparison node, a third current having the cell current value and a fourth current having the reference current value, thereby developing a voltage on the comparison node, anduse the buffer to generate an output of the sense amplifier, the output having a logical value determined by the voltage received at the single input terminal.
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Abstract
A circuit includes a memory cell that generates a cell current having a cell current value, a first reference cell that generates a first current having a first current value, and a second reference cell that generates a second current having a second current value. A current generating circuit generates a reference current having a reference current value based on the first current value and the second current value, and a sense amplifier sums, at a comparison node, a third current having the cell current value and a fourth current having the reference current value. A buffer outputs a voltage on the comparison node as an output of the sense amplifier.
15 Citations
20 Claims
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1. A circuit comprising:
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a memory cell configured to generate a cell current having a cell current value; a first reference cell configured to generate a first current having a first current value; a second reference cell configured to generate a second current having a second current value; a current generating circuit configured to generate a reference current having a reference current value based on the first current value and the second current value; and a sense amplifier comprising; a comparison node; and a buffer comprising a single input terminal coupled to the comparison node, wherein the sense amplifier is configured to sum, at the comparison node, a third current having the cell current value and a fourth current having the reference current value, thereby developing a voltage on the comparison node, and use the buffer to generate an output of the sense amplifier, the output having a logical value determined by the voltage received at the single input terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method comprising:
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receiving a first current and a second current at a reference current generating circuit; using the reference current generating circuit, generating a reference current based on the first current and the second current; receiving a cell current at a sense amplifier; summing, at a comparison node of the sense amplifier, a third current having a value of the reference current and a fourth current having a value of the cell current, thereby developing a voltage on the comparison node; receiving the voltage at a single input terminal of a buffer of the sense amplifier; and using the buffer to generate an output of the sense amplifier, the output having a logical value determined by the voltage received at the single input terminal. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A memory array comprising:
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a plurality of memory cells; a sense amplifier comprising a buffer, the buffer comprising a single input terminal; a first selection circuit configured to conduct a cell current between a selected memory cell of the plurality of memory cells and the sense amplifier; a first reference cell configured to generate a first current having a first current value; a second reference cell configured to generate a second current having a second current value; and a current generating circuit configured to generate a reference current having a reference current value based on the first current value and the second current value, wherein the sense amplifier is configured to develop a voltage at a comparison node based on a third current having a cell current value of the cell current and a fourth current having the reference current value, receive the voltage at the single input terminal of the buffer, and generate a sense amplifier output at an output of the buffer, the sense amplifier output having a logical value determined by the voltage received at the single input terminal. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification